This is not strictly necessary, as
- at least for the Ricoh chip in the A3000 and A4000, as those chips' Y10
registers happily continue to count up from 0xA if manually incremented
past 0x9.
- the Amiga ROMs and "setclock" commands seem to interpret 0xA 0x? like
200?, etc.
However,
- the Amiga setclock writes the modulo 10 value into the chips
- the chip docs of both chips, including the Y2K information of their
manufacturers, only refer to the range 0-9
- the chips increment from 9 to 0
So we better conform to this, to avoid unpleasant surprises.
"To fully support self-modifying code in any situation, it is imperative that
a CPUSHA intrcution is executed before the execution of the first self-modified
instruction. The CPUSHA instruction has the effect of ensuring that there is
no stale data iin memory, the pipeline is flushed, and instruction prefetches
are repeated and taken from external memory."
I verified that this is the only way (I can think of) to make the sigtramp
regression test work on 68040. doing cpushl dc; cinvl ic; over the affected
address range, then nop (to synchronize the pipeline) is not enough; apparently
the nop does not FLUSH the pipeline and prefetch...
Note that the 68060 UM has copied the above cited passage, but in fact this is
not true. This might be connected to the fact that the 68060 does ensure
memory access order under most conditions.
remove GENERIC.v6 file (as it is part of GENERIC now).
"faith" interface is commented out by default as it is not really for
general use.
IPsec items are commented out as well, though we can enable "options IPSEC"
without export-related issue ("options IPSEC" will enable authentication
portion only). We may need to think about it again.
if you have problem compiling with INET6 on archs I do not have access to,
please contact me.
XXX what to do with arch/arm32/SHARK{,.v6}?
This avoids a zero pointer dereference, which fixes PR 8571.
Make sbic_dmago() report selection timeouts to the upper layer.
This makes sbic really work again with 1.4L.
