Commit Graph

7 Commits

Author SHA1 Message Date
scw 9c10dc5c22 If DEBUG is defined, enable Cayman's NMI button. 2002-08-31 09:30:02 +00:00
scw 1fd693d5b5 In the IRL1 interrupt handler, you need to read the Interrupt
Source Register#0, Steve. Not the Board Operating Mode register. Duh.
2002-08-30 11:03:25 +00:00
scw de63e7f1e4 Swap the IRL numbers for FEMI and SUPERIO, after reading the Cayman
docs a bit more closely...
2002-08-30 10:59:39 +00:00
scw 5cc4fe3194 Slight tweak to how the sm(4) driver attaches to superio. Also, just
use the regular bus tag for sm(4) instead of superio's "special" ISA
bus tag.
2002-08-30 10:57:05 +00:00
scw 873939f14a Fix a typo which resulted in a bus_space_write_stream_4() where it
should have been bus_space_write_stream_2().

The sm(4) driver gets a bit further now.

While I'm here, g/c a debug printf accidentally commited last time around.
2002-08-29 18:11:07 +00:00
scw 9bcd736b9d Attach sm(4) at superio, instead of the previous isa bus attachment.
The latter's probe doesn't pick up the ethernet controller, and the
attach function needs to set MIIF_NOISOLATE.
We attach it at superio mainly because they share the same region of
address space, and the ethernet controller's interrupt is routed
through the superio.
2002-08-26 11:04:44 +00:00
scw 59474a8c82 NetBSD, meet the SH-5 cpu.
SH-5, meet NetBSD.

Let's hope this is the start of a long and fruitful relationship. :-)

This code, funded by Wasabi Systems, adds initial support for the
Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD.

At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator
which has no simulated devices other than a simple console. However, it
is good enough to get to the "root device: " prompt.

Device driver support for Real SH-5 Hardware is in place, particularly for
supporting the up-coming Cayman evaluation board, and should be quite
easy to get running when the hardware is available.

There is no in-tree toolchain for this port at this time. Gcc-current has
rudimentary SH-5 support but it is known to be buggy. A working toolchain
was obtained from SuperH to facilitate this port. Gcc-current will be
fixed in due course.

The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has
currently only been tested in 32-bit mode. It is bi-endian, via a boot-
time option and it also has an "SHcompact" mode in which it will execute
SH-[34] user-land instructions.

For more information on the SH-5, see www.superh.com. Suffice to say it
is *not* just another respin of the SH-[34].
2002-07-05 13:31:28 +00:00