PCI-ISA bridge callback mechanism to attach the ISA bus to the PCI=ISA
bridge.
This is basically an import of the i386 pcib.c code with very minor
changes.
Modify current_spl_level to reflect the temporary change in interrupt
priority level which dispatching.
Don't increment the interrupt stats for every handler in the interrupt chain.
Cleaned up a number of comments.
Define soft interrupt names.
A few miscellaneous tidy ups.
Removed any remnants of soft interrupt dispatching.
Cleaned up a number of comments.
Removed a number of blank lines.
Nuked register keywords.
Made sure code is in sync with interrupt handling for other ARM hardware.
Update set_spl_masks() to reflect the _SPL_SOFT* macros.
Initialise the soft interrupt mask array.
Update dump_spl_masks() to dump all the hardware and software spl masks.
with the spl_smasks array and the current_spl_level variable to work
out which soft interrupts are pending.
This means that soft interrupts are now separated from the hardware
interrupts so a full 32 hardware and 32 software interrupts can now be
supported.
Implement clearsoftintr() function.
Define several macros to make the soft interrupt dispatching code cleaner.
Implement setsoftserial() function.
Implement soft serial interrupt dispatching.
Remove all soft interrupt definitions now soft interrupts are being
separated from hardware ones.
Reserved interrupts do not have any special uses so only define then if
needed as placeholders.
appropriate spl* macros.
Move spllpt() maro here from intr.h
Prototype setsoftserial().
Define spl_smasks array for software interrupt masks to complement the
hardware interrupt masks.
the kernel page tables. map_chunk() replaces running a loop, calling
map_entry() and in addition where possible it will use L1 section mappings
or L2 large page mappings instead of L2 small page mappings in order to
reduce the TLB entried needed for the kernel.
as they are no longer reference.
Move ALT_PAGE_TBLS_BASE from 0xf3c00000 to 0xf0c00000.
Increase the size of the KERNEL_VM_SIZE by 16MB now that 0xf3xxxxxx is free.
the L2 pages tables (CURRENT_PAGEDIR_HOLE).
Don't map the L1 page table into the L2 page table space any more (easy
reference hack) in pmap_allocpagedir().
Further cleanup and simply the allocation and mapping of the kernel
pagetables and static data pages.
Removed the page directory page table as it is no longer necessary.
Changed the allocation of the proc0 L1 page table and L2 page table
that maps the page tables to map these pages into kernel virtual
address space.
Updated for pv_addr_t argument changes to pmap_bootstrap().
to obtains pv_addr_t structures for the proc0 L1 page table and the proc0
pagetable that maps page tables.
Use the virtual address from the pv_addr_t structure for the proc0 L1 page
table when calling pmap_bootstrap rather than relying on a special mapping
at PAGE_DIRS_BASE.
Modify ofw_construct_proc0_addrspace() for similar changes to
ofw_configmem().
Remove the kernel_pde page table in ofw_construct_proc0_addrspace() as it
it now longer needed.
for the page table to map kernel pagetables (kernel_ptpt). This means
that the pm_vptpt field is now valid for the kernel_pmap.
Use constants from vmparam.h in pmap_allocpagedir().
Simplified serveral parts of the initarm() to make the code clearer and
modified parts of initarm() as part of an on-going effort to abstract
out part of initarm() on various machines.
place (some moved from param.h)
Define several constants such as page table addresses in terms of other
constants.
Increase some of the limits :
MAXTSIZ 8MB -> 16MB
DFLDSIZ 16MB -> 128MB
MAXDSIZ 256MB -> 512MB
DFLSSIZ 512KB -> 2MB
This is necessary as the memory addresses being used for the cache clean
(if the CPU is a SA110) may have been remapped by the setttb() call and
thus the cache could loose sync with memory.
* Improve the midisyn layer a little.
* Add a driver for the Yamaha OPL[23] FM synths.
The opl driver is not finished yet; it sounds pretty awful.
For some strange reason I cannot get any FM sound from my SB64 cards,
but a regular SB16 works fine.
Instead use a flag to indicate that all user space access are blocked
during the cache op to ensure that user space virtual addresses correctly
expunged from the cache.
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