support code, using the common MIPS 3 cp0 based interrupt code, adding
time counters, and using the generic TODR code.
Unfortunately, due to lack of hardware, I don't know for sure that any
of this works, though the same code in evbmips works. Commiting anyway,
ok'd by simon@.
Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS
are defined.
Remove old VM constants from cesfic port.
Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
support the P-5064, which has a QED RM5xxx CPU soldered on.
There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).
There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.
Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
