enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
- Use _cpu_intr_suspend()/_cpu_intr_resume() in G2_LOCK/G2_UNLOCK macros
rather than _cpu_exception_suspend()/_cpu_exception_resume().
TLB miss exceptions could happen on accessing buffer, but it will never
block G2bus cycle anyway.
- Restore the previous SR.IMASK value in G2_UNLOCK().
- some misc cosmetics.
Should fix spontaneous reboots by "ping -s 8192 host" on the LAN Adapter.
so handle it properly by an additional quirk flag in sc_flags.
The problem was reported by Pat Wendorf on port-dreamcast, and
the fix was suggested and confirmed by Christian Groessler.
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
disable_intr, enable_intr, disable_interrupt, enable_interrupt,
disable_ext_intr, enable_ext_intr.
New functions:
for external interrupt:
_cpu_intr_suspend and _cpu_intr_resume.
for exception:
_cpu_exception_suspend and _cpu_exception_resume.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
Three different IRQ:s can be selected for each event, 9, 11, or 13
(which selects hardware priority). More events to be added as they
are discovered. Do not use shb_intr_establish() to register IRQ 9, 11
or 13 anymore.
- pmap_enter()
- pmap_remove()
- pmap_protect()
- pmap_kenter_pa()
- pmap_kremove()
as described in pmap(9).
These calls are relatively conservative. It may be possible to
optimize these a little more.
marcus