macallan
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8005322523
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more cpuregs.h
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2015-06-09 16:10:48 +00:00 |
|
macallan
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ec31a2edcd
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include cpuregs.h
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2015-06-09 15:58:38 +00:00 |
|
matt
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605a1ecfb0
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Fix mips_fixup_zero_relative to have a third argument (ignored).
When reading COP0 EBASE, verify that the fixed bits have the right value.
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2015-06-09 15:01:05 +00:00 |
|
matt
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f697a6dc1e
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Fix corruption of EntryHi (restored from wrong register).
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2015-06-09 14:40:42 +00:00 |
|
martin
|
e44e5ead26
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Fix period handling
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2015-06-09 12:46:37 +00:00 |
|
martin
|
da3a80aaef
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Reenable preemption before returning an error when trying to set the
watchdog to an invalid period.
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2015-06-09 12:10:08 +00:00 |
|
skrll
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c62023da75
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Use armreg_auxctl_{read,write} instead of inline asm.
No functional change.
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2015-06-09 10:44:55 +00:00 |
|
skrll
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5a9e8f996f
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Correct a comment
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2015-06-09 10:22:15 +00:00 |
|
martin
|
1ee53895c7
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Fix printf formats for db_expr_t on 32bit kernels
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2015-06-09 09:18:37 +00:00 |
|
skrll
|
f282ebc39b
|
KNF a comment
|
2015-06-09 08:13:17 +00:00 |
|
skrll
|
b3127e4c23
|
Trailing whitespace.
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2015-06-09 08:09:24 +00:00 |
|
skrll
|
6b30782b39
|
Use TTBR_[UM]PATTR in a9_mpsubr.S as well as cpufunc_asm_armv7
Prompted by matt@
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2015-06-09 08:08:14 +00:00 |
|
macallan
|
3b04b253c2
|
sync _MTC0_V0_USERLOCAL with cpuregs.h
now CI20 boots again
|
2015-06-08 18:22:23 +00:00 |
|
matt
|
7782a8ab0c
|
#include <mips/cpuregs.h>
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2015-06-08 16:25:29 +00:00 |
|
matt
|
18be05de29
|
Add wdog0
|
2015-06-08 14:42:38 +00:00 |
|
matt
|
b0951873b7
|
Fix octeon_reset_vector to work in non-MP kernels.
|
2015-06-08 14:24:20 +00:00 |
|
matt
|
e069fa61fc
|
Add bluetooth
|
2015-06-07 21:05:33 +00:00 |
|
mlelstv
|
e48922a086
|
Fix space calculation for dump header. Round up to clicks to avoid
disk alignment issues.
|
2015-06-07 20:00:11 +00:00 |
|
skrll
|
948af22daf
|
Dont use magic number.
No functional change.
|
2015-06-07 12:01:41 +00:00 |
|
matt
|
8f95c8a398
|
Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
|
2015-06-07 08:03:10 +00:00 |
|
matt
|
6624f40a20
|
#include <mips/cpuregs.h>
|
2015-06-07 07:19:21 +00:00 |
|
matt
|
a7346dbcbf
|
Multiple inclusion protection
|
2015-06-07 07:14:47 +00:00 |
|
matt
|
682a7cddf7
|
assembly no longer include <machine/cpu.h>. Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h. <mips/mips_param.h> no
longer include <machine/cpu.h>
|
2015-06-07 06:07:49 +00:00 |
|
matt
|
b45b235ea3
|
Add an assert to verify interrupts are enabled.
|
2015-06-06 22:23:31 +00:00 |
|
matt
|
0112a16de0
|
Add a few KDASSERT for interrupts being enabled.
|
2015-06-06 22:22:03 +00:00 |
|
matt
|
f7fec9a073
|
Make db_expr_t long long when using the N32 ABI.
|
2015-06-06 22:19:07 +00:00 |
|
matt
|
e1471d6403
|
Add mipsX_nonmaskable_intr if DDB is defined.
Add missing */ at end of comment.
Use trap instructon on mipsNN in paranoia sections instead of endless loop.
|
2015-06-06 21:48:45 +00:00 |
|
matt
|
9c81e9b67f
|
Convert a KASSERT to KASSERTMSG
|
2015-06-06 21:46:17 +00:00 |
|
matt
|
542cc5617c
|
On mipsNN use trap instructions when inconsistent status register settings
are found.
|
2015-06-06 21:45:40 +00:00 |
|
matt
|
3018f20610
|
Use ci_nmi_stack
|
2015-06-06 21:44:16 +00:00 |
|
matt
|
991d081316
|
Reuse the ci_next to hold the nmi exception stack.
|
2015-06-06 21:38:47 +00:00 |
|
matt
|
719767422e
|
Add octeon_reset_vector which handles soft resets and nmi that comes through
the boot vector @ 0xbfc00000.
|
2015-06-06 21:05:16 +00:00 |
|
matt
|
02f5ae8942
|
Add more KASSERTs
After each CPU is marked running, wait a small of time or until it shows
up in kcpuset_running.
|
2015-06-06 21:03:45 +00:00 |
|
matt
|
d58fd45326
|
On mipsNN use the trap instruction to panic or pop into ddb instead of
looping forever in the PARANOIA chunks.
|
2015-06-06 20:55:45 +00:00 |
|
matt
|
841b78119f
|
Add support for NMI exception (which don't use the cause register).
|
2015-06-06 20:53:38 +00:00 |
|
matt
|
847a18937e
|
Add wdog support
cleanup IPI and MP support
Add NMI support.
|
2015-06-06 20:52:16 +00:00 |
|
matt
|
29ebd0ba65
|
Add CIU_BASE
|
2015-06-06 20:15:35 +00:00 |
|
macallan
|
4efe1f19ef
|
use PRIxCPUSET
now this builds again on o32
|
2015-06-06 17:46:47 +00:00 |
|
macallan
|
700e4e855d
|
introduce PRIxCPUSET to deal with 32bit __cpuset_t on o32
|
2015-06-06 17:45:49 +00:00 |
|
jmcneill
|
c39a576f5e
|
enable trng driver
|
2015-06-06 14:00:52 +00:00 |
|
jmcneill
|
1a286b4698
|
Add driver for AM335x TRNG module.
|
2015-06-06 14:00:32 +00:00 |
|
matt
|
58e36827ad
|
Add a KDASSERT to make sure interrupts are still enabled.
|
2015-06-06 04:43:41 +00:00 |
|
matt
|
f847872456
|
If mipsNN and kernel has DDB, trap on bogus IPL values passed to splraise.
|
2015-06-06 04:40:19 +00:00 |
|
matt
|
99bd0c3950
|
Add octeon mach commands nmi and reset. Teach DDB about Cavium BBIT branch
instructions.
|
2015-06-06 04:38:52 +00:00 |
|
matt
|
b80b83d425
|
Backout last change.
|
2015-06-06 04:36:15 +00:00 |
|
matt
|
4aed5bc269
|
Add IPI_WDOG
|
2015-06-06 04:34:57 +00:00 |
|
matt
|
047792e8e8
|
Add a wdog for octeon
|
2015-06-06 04:34:23 +00:00 |
|
matt
|
bfd74ed96c
|
Fix CUI_MBOX_{SET,CLR}1 values
|
2015-06-06 04:33:45 +00:00 |
|
matt
|
26acb1613d
|
Fix disassembly of trap-immediate instructions
|
2015-06-06 04:32:47 +00:00 |
|
matt
|
8d2429aa5f
|
Add a IPI for watchdogs.
|
2015-06-06 04:31:52 +00:00 |
|