Commit Graph

14 Commits

Author SHA1 Message Date
scw
35110949ce Ditch the `simulated' software interrupt in favour of
hardware-assisted soft interrupts on all boards.
(Note: VMEChip2-less 162/172 not yet tested)

This greatly simplifies the `rei' path and allows
interrupt nesting to be tracked somewhat more easily.

As a result we now have a working CLKF_INTR() macro
and can detect uvm_fault() being called from an interrupt
(although there may still be a very short race detecting
the latter; need to investigate further).
2001-07-06 19:00:12 +00:00
scw
59ba4788ce Deprecate intrcnt/intrnames in favour of the generic evcnt(9) interface. 2001-05-31 18:46:07 +00:00
scw
a70c48655b Add a bus_space_tag_t field to the mvmebus_softc structure and
initialise/use it in the ASIC-specific back-ends.
2000-11-24 09:27:42 +00:00
scw
b6f0a678dd Add support for the m68060-based machines: MVME-172 and MVME-177.
CPU support taken from a combination of NetBSD/amiga and NetBSD/x68k.

At this time, MVME-172 works but MVME-177 is untested. Since the '177
is otherwise identical to the MVME-167, this should *just work*.
2000-11-20 19:35:28 +00:00
scw
0161d6a880 Pass the requested cpu irq priority through to the VME chipset-specific
backend.

The VME2chip can use this to translate a VMEbus irq to a cpu irq.

The VMEchip (on mvme147) can't deal with the VMEbus irq and cpu irq
being different so we just panic in that case for now.
2000-09-19 19:35:52 +00:00
scw
7f3786d36a Add preliminary support for the MVME162-LX 200/300 series of boards.
Currently, the major onboard devices are supported (disk, network,
rs232 and VMEbus). However, work is still need to support the remaining
devices (eg. IndustryPack sites).

These boards are available with a dazzling array of build options. At
this time, the following options are *required*:

	o Real floating point hardware (the 68LC040 model isn't tested),
	o The VMEchip2 must be present,
	o If offboard VMEbus RAM is not present, at least 8MB of onboard
	  RAM is required.
	o Even if offboard VMEbus RAM *is* present, at least 4MB of onboard
	  RAM is required. (Boards with 1 or 2MB onboard RAM *can* be
	  supported with offboard RAM, but not without some funky values in
	  the VMEbus Master mapping registers.)

There is no support for boards other than those in the -LX 200/300 series.
2000-09-06 19:51:42 +00:00
scw
da7dfaefcc Though the VMEchip2 documentation is not explicit on the subject, a
VMEbus analyser confirms that D8 transfers are possible on all the
master ranges.
2000-08-23 08:13:14 +00:00
scw
3cac59ee4f Expand on how VMEbus master addressing modes are specified, to better
deal with dynamic address modifier generation based on the CPU's
function code pins.

Also implement VMEbus slave mode for mvme147. (Not yet 100% working.)
2000-08-20 21:51:31 +00:00
scw
3f2adcb2b0 Checkpoint of code to add VMEbus slave support using vme_dmamap* and
vme_dmamem*.

This is still a work in progress, but seems to DTRT on mvme167 so far.

TODO:
	. Get VMEbus slave mode going on mvme147. This should be easy.
	. Fix up the A16 slave mappings.
	. Bounce buffer support. (Messy, but pretty much a `must have'.)
	. Figure out how to deal with `location monitor' interrupts
	  within the framework. (Useful for Busnet, among other things.)
	. It would be nice to make use of the VMEchip2's DMA facilities...
2000-08-20 17:07:41 +00:00
scw
b77bc217e1 Pull a bunch of common code from vme_pcc.c and vme_two.c into
the new mvmebus.[ch] files, and put down some initial code to
deal with VMEbus slave mode.
2000-08-13 17:00:51 +00:00
scw
c42886a2b8 Fix the `evcnt' prototypes. 2000-06-23 20:07:49 +00:00
cgd
cffb580806 Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).
2000-06-04 19:14:14 +00:00
scw
9c745dbd5e Merge 'scw_mvme68k_bus_space' branch with the trunk.
These changes add support for:

	o The MI VMEbus framework on both MVME147 and MVME167.
	o Enhancements to the existing MD bus_space(9) implementation.
	o Most of the bus_dma(9) API.
2000-03-18 22:33:02 +00:00
scw
4f53e52d8a Add support for the VMEchip2 and the ncr53c710 SCSI IOP.
VMEchip2 support work is ongoing. SCSI is complete.
1999-02-20 00:11:59 +00:00