Commit Graph

8 Commits

Author SHA1 Message Date
scw da7dfaefcc Though the VMEchip2 documentation is not explicit on the subject, a
VMEbus analyser confirms that D8 transfers are possible on all the
master ranges.
2000-08-23 08:13:14 +00:00
scw 3cac59ee4f Expand on how VMEbus master addressing modes are specified, to better
deal with dynamic address modifier generation based on the CPU's
function code pins.

Also implement VMEbus slave mode for mvme147. (Not yet 100% working.)
2000-08-20 21:51:31 +00:00
scw 3f2adcb2b0 Checkpoint of code to add VMEbus slave support using vme_dmamap* and
vme_dmamem*.

This is still a work in progress, but seems to DTRT on mvme167 so far.

TODO:
	. Get VMEbus slave mode going on mvme147. This should be easy.
	. Fix up the A16 slave mappings.
	. Bounce buffer support. (Messy, but pretty much a `must have'.)
	. Figure out how to deal with `location monitor' interrupts
	  within the framework. (Useful for Busnet, among other things.)
	. It would be nice to make use of the VMEchip2's DMA facilities...
2000-08-20 17:07:41 +00:00
scw b77bc217e1 Pull a bunch of common code from vme_pcc.c and vme_two.c into
the new mvmebus.[ch] files, and put down some initial code to
deal with VMEbus slave mode.
2000-08-13 17:00:51 +00:00
scw c42886a2b8 Fix the `evcnt' prototypes. 2000-06-23 20:07:49 +00:00
cgd cffb580806 Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).
2000-06-04 19:14:14 +00:00
scw 9c745dbd5e Merge 'scw_mvme68k_bus_space' branch with the trunk.
These changes add support for:

	o The MI VMEbus framework on both MVME147 and MVME167.
	o Enhancements to the existing MD bus_space(9) implementation.
	o Most of the bus_dma(9) API.
2000-03-18 22:33:02 +00:00
scw 4f53e52d8a Add support for the VMEchip2 and the ncr53c710 SCSI IOP.
VMEchip2 support work is ongoing. SCSI is complete.
1999-02-20 00:11:59 +00:00