rather than and-ing 16G-1. That just strips the k0seg bits, rather
than making the false assumption that the physical address is going
to be in the lower 16G. That doesn't apply for CIA device-space
addresses, for instance.
deleting (and cleaning up) N pages of #ifdefs in machdep.c. While we're
at it, make the cpu type options generate flags, and check them instead of
kernel Makefile defines.
create an assembly label, and SYSCALLNUM to convert a syscall name into
the macro that's defined to be its number. Add a CALLSYS_NOERROR macro
which invokes the named system call. (CALLSYS_NOERROR is here since
it's used in locore, for sigcode.)
consistency with the way machdep headers for other things are done.
(the creation of the ecoff_machdep.h files was done on the CVS server, to
keep the RCS logs intact.)
macros to use to remove #ifdefs from the machine ID case check.
Eventually, these headers will contain other information, e.g.
machine-dependent relocation information, etc.
and IEEE S and T floating datum loads and stores. VAX floating data
types not yet supported, and in the future will only be supported if
FIX_UNALIGNED_VAX_FP is defined. (No point in wasting the space when
most of the time there will never be VAX FP loads and stores.) Right
now, these features can be controlled only by sysctl. The (boolean)
integer sysctls machdep.unaligned_print, machdep.unaligned_fix, and
machdep.unaligned_sigbus control printing about unaligned accesses
(defaults on), fixing up of unaligned accesses (defaults on), and
forcing a SIGBUS on unaligned accesses (defaults off). If an access
is not fixed up (for lack of method or explicit decision), a SIGBUS is
always generated to keep programs from using bogus data. At some point,
these three choices should be controlled by per-process flags, as well.
more naturally in terms of way the OSF/1 PALcode delivers traps and
interrupts. Clean up fault/exception handling code and system entry
points. Seperate ASTs into a seperate C function.
(2) Restructure and improve machine check and correctable error
handling based on information in the 2nd Ed. of the Alpha Architecture
Reference Manual.
(3) Removed unused (and not likely useful) PALcode assembly stubs.
more naturally in terms of way the OSF/1 PALcode delivers traps and
interrupts. Clean up fault/exception handling code and system entry
points. Seperate ASTs into a seperate C function.
containing a substruct (the hardware frame) and an array of registers,
treat it like one big array of registers, for easier and prettier
access. Update everything to deal with that.
Process Control Block
Interrupt/Exception/Syscall Stack Frame
Machine Check Error Summary Register
Machine Check Logout Area
clean up some, and add prototypes for all of the CPU instruction and
PALcode function stubs.
cgd