Commit Graph

53 Commits

Author SHA1 Message Date
mjacob
7aac86133e Pointy hat to me on the last delta. 2002-05-18 00:48:11 +00:00
mjacob
a14da6673f Replicate change that Matt Thomas made in isp_pci- if we get ENOMEM/EAGAIN
in bus_dmamap_load, return CMD_EAGAIN rather than just make the command dead.
2002-05-17 19:06:24 +00:00
eeh
86ff330657 Fixup attachment code to use sbus_promaddr_to_handle() and not specify
BUS_SPACE_MAP_LINEAR.
2002-03-21 00:16:15 +00:00
pk
f61bdee8e7 Get rid of `bus_type_t' and use BUS_ADDR() (in sbus_bus_map()) to construct
a `bus_addr_t' to pass on to bus_space_map().

Drop `va' argument from sbus_bus_map(); it should not be used by MI Sbus
drivers.
2002-03-11 16:00:55 +00:00
mjacob
91f80cf3fc Implement F/W crashdumps for 2200 && 2300 cards (kernel compile option).
Distinguish between 2312 and 2300 cards (they *are* different). Enable
RIO (Reduced Interrupt Operation) for the LVD cards (hey- I've seen
batched completions of the 30 commands at a time with this,....)...

If we get a Port Logout on local loop topologies, we have to force the
f/w to log back in. The easiest way (for us) to do this is to force
a LIP. This also will wake up the disk that probably just had a f/w crash.

Implement mailbox 'continuations'- this allows interrupts to re-drive
a mailbox command if it's one that just essentially repeats the previous
mailbox command (e.g., f/w download). This saves a boatload of sleep/wakeup
twitches.

If we're not a 2300 and we're about to return with a 'bogus interrupt'- check
the semaphore register to be non-zero at all and outgoing mailbox 0- this
seems to be where some of the lost ISP1080 commands came from.
2002-02-21 22:32:40 +00:00
mjacob
219d22404b Major restructuring for swizzling to the request queue and unswizzling from
the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.

The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it).

One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.

Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.

For NetBSD, it does a ddi_dmamap_sync as appropriate. This gets us out of
the explicit ddi_dmamap_sync on the whole response queue that we did for SBus
cards at each interrupt.

Set things up so that platforms that cannot have an SBus don't get a lot of
the SBus code checks (dead coded out).

Additional changes:

Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.

Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).

Explicitly decode GetAllNext SNS Response back *as* a GetAllNext response.
Otherwise, we won't unswizzle it correctly.

Nuke some additional __P macros.
2001-12-14 00:13:44 +00:00
lukem
7ba10b3532 add RCSIDs 2001-11-13 06:54:32 +00:00
eeh
98ecb5b215 getprop* -> PROM_getprop* 2001-09-26 20:53:05 +00:00
mjacob
6bb9f4a949 Add support for 2 Gigabit cards (2300/2312). This necessitated a change
in how interrupts are down- the 23XX has not only a different place to check
for an interrupt, but unlike all other QLogic cards, you have to read the
status as a 32 bit word- not 16 bit words. Rather than have device specific
functions as called from the core module (in isp_intr), it makes more sense
to have the platform/bus modules do the gruntwork of splitting out the
isr, semaphore register and the first outgoing mailbox register (if needed)
*prior* to calling isp_intr (if calling isp_intr is necessary at all).
2001-09-01 07:12:23 +00:00
mjacob
48e09f672e twiddle isp_xflist calculation to match more closes isp_pci.c 2001-07-06 16:09:38 +00:00
mjacob
f13ec50e47 Clean up bus dma code for request/response queues. 2001-04-12 21:40:56 +00:00
mjacob
272082c697 ansify code 2001-03-14 06:58:25 +00:00
thorpej
c8f050a7f1 Use bus_dmamap_load(), not bus_dmamap_load_raw(), and add
BUS_DMA_STREAMING to data transfer map loads.
2001-03-08 02:21:44 +00:00
mjacob
0adf4d13bb Oh, god, make the pain stop. "Fix" this one more time- but for the next
to last time.

It turns out that in fact, sparc64 was *not* working. There is a discussion
within the tech-kern@netbsd.org mail list as of just prior to this date
that contains the details.

Suffice to say that for sparc64 we have to add back in the usage
of BUS_DMA_COHERENT again to the call to bus_dmamap_load_raw. PK
added the usage of bus_dmamap_load_raw- which agrees with the
man page description of it- but now does not match what the
original BusDma author seems to think it's supposed to do.

While we're at it, do a specific set of steps for setting up and,
if necessary, tearing down, mailbox dma mappings.
2001-02-28 05:46:46 +00:00
mjacob
0dce6b45bc this was *still* wrong 2001-02-25 01:49:18 +00:00
mjacob
9d2a3fb24d More Kudos to Izumi: fix another argument to bus_dmamap_sync 2001-02-25 01:44:02 +00:00
mjacob
d5f967e27f Now that the underlying code for bus_dmamap_sync appears to do the
right thing, don't use the illegal and "just worked by chance" addition
of BUS_DMA_COHERENT to bus_dmamap_load_raw. There still is a necessity
to add to the architecture to allow one to hint that this should be
a cache coherent mapping.

Fix offset argument to be zero for flushing data tranfers. Kudos to Izumi
for spotting this.
2001-02-24 23:30:01 +00:00
mjacob
e8ae80a071 Add missing BUS_DMA_COHERENT to bus_dmamap_load_raw calls for request
and response queues- this makes this work on UltraSparc now.
2001-02-23 23:57:47 +00:00
mjacob
3744fa3f33 Implement bootverbose recognition. Move interrupt registry up a bit so we can
use interrupting mailbox commands for isp_init. Set default HBA role.
Rename request/response dma maps to be more consistent with PCI version.
Enable bus_dmamap_sync on request queue- we already do this for response
queue- better do it for the request queue as well.

Checked to be working against a Sparc10.
2001-02-23 17:28:58 +00:00
wiz
c8b0b91e7e Fix pathnames in comment. 2000-12-23 01:37:57 +00:00
mjacob
0a481d850d fix SBus bursting *correctly* this time 2000-10-22 03:04:50 +00:00
mjacob
cecccb23b2 quiet chatty boot messages 2000-10-17 17:39:10 +00:00
mjacob
7cc31292b3 Turn on 32 byte bursting for ISP 2000-10-16 05:13:13 +00:00
mjacob
d8aef491c1 Add a maintenance note. Add a bus specific isp_sbus_intr function- this is
so we, ahem, note we're on an interrupt stack so we don't try and sleep
on any mailbox commands we might want to run.
2000-08-14 07:00:08 +00:00
mjacob
068c76fc80 Core version 2.0 (platform version 1.0) rewrite of ISP driver. Some
interace cleanups, some new common functions. The major impact that
will be noticeable right away is that if you boot with not Fibre connected
to the FC cards, you no longer hang indefinitely.
2000-08-01 23:55:09 +00:00
pk
406e0f779f Add a `device class' interrupt level argument (from machine/intr.h)
to bus_interrupt_establish().

It's currently only used in sparc64/dev/psycho.c to assign a CPU interrupt
level to devices in PCI slots.
2000-07-09 20:57:41 +00:00
mjacob
855b5ef9b0 Use new isp_handle_index inline function. Change order in whch
some things are done. Remember to enable interrupts after calling
isp_reset but before isp_attach.
2000-07-05 22:10:56 +00:00
pk
82dbe14248 No need to specify page alignment; this is automatic. 2000-05-10 14:25:43 +00:00
pk
bb1605cff5 Fix bogus `boundary' argument in bus_dmamap_create(). 2000-05-10 14:16:11 +00:00
pk
18a16edec1 Conform bus_dmamem_{alloc,map} usage to bus_dma(9) specs. 2000-05-09 23:16:19 +00:00
mjacob
6f13498242 correct oops on last checkin 2000-02-19 15:13:07 +00:00
mjacob
a9697ee5f2 Handle > 12 byte CDBs. 2000-02-19 01:55:42 +00:00
mjacob
0e0104d0e9 There is no readily available tool to set NVRAM on isp's on sparc,
so ignore it.
2000-01-14 08:43:17 +00:00
mjacob
2a7d01e353 The trigger for not downloading f/w is now a
NULL f/w pointer, not a nonzero f/w length.
2000-01-09 18:55:11 +00:00
mjacob
250a1f41c2 The sense of being able to sleep for DMA resources was reversed. Oops. 2000-01-09 18:44:40 +00:00
mjacob
5babd2b8c9 get back to looking at config flags 1999-12-20 00:49:58 +00:00
mjacob
e6da5abb16 Add back in inclusion of microcode and rationalize it. request/response
queue indices need to be u_int16_t wide.
1999-12-04 02:56:30 +00:00
pk
d5a471ccc9 Check presence of Sbus interrupt properties before using them.
Only one case is known to trigger this omission: a Sparc Classic
configured as X terminal.
1999-11-21 15:01:50 +00:00
mjacob
44c603dd7b Remove reference to loadable f/w. 1999-10-28 16:11:19 +00:00
mjacob
6bbb170768 We alloc xflist and dma maps in mailbox setup. We swizzle endian stuff
at the end of dma setup.
1999-10-14 02:16:04 +00:00
thorpej
63b8530b4e Update for SCSPI changes. 1999-09-30 23:04:39 +00:00
pk
61e5d73035 Fix bus_size_t/size_t/int confusion. 1999-05-27 14:22:28 +00:00
pk
569836a986 It is no longer necessary to protect bus_dma_[un]load() at splbio, since
sparc bus_dma*() functions now protect their own internals..
1999-04-25 10:40:53 +00:00
mjacob
d8aa229a12 roll internal release tag 1999-03-26 22:45:17 +00:00
pk
54ae4d24b8 Call bus_dma_[un]load() at splbio. 1999-03-23 00:38:15 +00:00
mjacob
c312dfb410 prototype 1080/1240 support caused register offset rewhack 1999-03-17 06:17:16 +00:00
mjacob
1a911bb798 roll internal release level 1999-02-09 00:54:07 +00:00
mjacob
5c5ac2958f roll internal release tag and finally use bus_space I/O 1999-01-30 07:10:38 +00:00
mjacob
e618c0c7d7 turn on SBUS bursts 1999-01-10 06:22:12 +00:00
mjacob
d6cab14b00 clean up headers 1998-12-28 19:12:26 +00:00