Commit Graph

477 Commits

Author SHA1 Message Date
scw
60fb656ee5 Validate the branch target registers and saved PC using the
appropriate macro.
2002-07-11 21:23:30 +00:00
scw
14013f679d Add a macro which verifies that a 64-bit value is a valid effective
address as defined by the cpu's Implemented Effective Address bits.
2002-07-11 21:21:58 +00:00
scw
d08670adc8 Sync with reality. 2002-07-11 21:20:23 +00:00
scw
0d0a6374ef Some cleanups for the MACHINE_ARCH endian suffix change. 2002-07-11 14:42:55 +00:00
scw
d55184012a Cleanup the sigcontext structure, and sync {,sig}jmp_buf size and
offsets with it.
2002-07-11 14:16:42 +00:00
scw
5c90e3c0d6 In sys___sigreturn14(), validate the saved branch target registers and
program counter to avoid a possible kernel-mode IADDERR exception when
we try to restore the trapframe on return to user-mode.
2002-07-11 14:15:32 +00:00
scw
384b76c19b Install <sh5/pte.h> for the benefit of cpu.h. 2002-07-11 14:11:18 +00:00
scw
e0e8310758 Include <machine/frame.h>, not <sh5/frame.h> 2002-07-11 14:10:39 +00:00
scw
026df6bf33 Cleanup the frame link/unlink macroes. 2002-07-11 14:09:34 +00:00
scw
b234c1aa10 Moved MID_MACHINE definition from <machine/param.h> 2002-07-11 14:08:45 +00:00
scw
52876ee77d First cut of the kernel side support for sh5 signals. 2002-07-10 15:55:01 +00:00
scw
528a743ee9 Update sh5_fpsave() prototype to match reality. 2002-07-10 15:53:57 +00:00
scw
a30ba3dd9a Need <sys/types.h> 2002-07-10 15:52:49 +00:00
scw
f78244feaf Before returning to userland, clear the FPU regs saved flag. 2002-07-10 15:52:07 +00:00
scw
0f3678d589 Track FPU register save status. 2002-07-10 15:49:33 +00:00
scw
51f3f8ff9c More superh toolchain hacks. This time, it expects wchar_t to be a short. 2002-07-10 12:23:08 +00:00
scw
187f1ae3a1 Some hacks which will go away when we switch to a native NetBSD toolchain.
The SuperH compiler erroneously prepends underscores to global syms...
2002-07-10 11:36:23 +00:00
scw
5f0c27f158 Missed some semi-colons. 2002-07-10 11:31:25 +00:00
scw
0b074fa253 SH5 floating point support, based on sh3. 2002-07-10 10:38:22 +00:00
scw
f616928985 Doh, missed a #endif 2002-07-10 10:30:19 +00:00
scw
ea38860915 SH5 profiling support. 2002-07-10 10:24:16 +00:00
scw
c7510b3b78 Fix FP reg names 2002-07-10 10:22:43 +00:00
scw
293298968a Descend into include subdirs and install relevant headers. 2002-07-10 08:56:11 +00:00
scw
8324df7cf0 Sync the ktrsyscall() arguments with -current reality. 2002-07-05 14:05:58 +00:00
scw
63fd77b84b Sync the sendsig() argument list with -current reality. 2002-07-05 14:04:00 +00:00
scw
8aecaeac04 Roll our own CWARNFLAGS. There are some things in MI code which the
SuperH version of gcc barfs over.
2002-07-05 14:02:31 +00:00
scw
59474a8c82 NetBSD, meet the SH-5 cpu.
SH-5, meet NetBSD.

Let's hope this is the start of a long and fruitful relationship. :-)

This code, funded by Wasabi Systems, adds initial support for the
Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD.

At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator
which has no simulated devices other than a simple console. However, it
is good enough to get to the "root device: " prompt.

Device driver support for Real SH-5 Hardware is in place, particularly for
supporting the up-coming Cayman evaluation board, and should be quite
easy to get running when the hardware is available.

There is no in-tree toolchain for this port at this time. Gcc-current has
rudimentary SH-5 support but it is known to be buggy. A working toolchain
was obtained from SuperH to facilitate this port. Gcc-current will be
fixed in due course.

The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has
currently only been tested in 32-bit mode. It is bi-endian, via a boot-
time option and it also has an "SHcompact" mode in which it will execute
SH-[34] user-land instructions.

For more information on the SH-5, see www.superh.com. Suffice to say it
is *not* just another respin of the SH-[34].
2002-07-05 13:31:28 +00:00