modifies machine/db_machdep.h: BKPT_SET(inst) to BKPT_SET(inst, addr) for all archs ie; passess the
breakpoint address as well.
Patch from cherry@mahiti.org
- use vmspace rather than proc or lwp where appropriate.
the latter is more natural to specify an address space.
(and less likely to be abused for random purposes.)
- fix a swdmover race.
sys/bswap.h in order to pick up the MD inline routines and the constant
folding definitions in the right order.
Code can include either sys/bswap.h or machine/bswap.h with the same effect.
#define clockframe somethingelse
to:
struct clockframe {
struct somethingelse cf_se;
};
and change access macros accordingly.
That means that, at least for that very issue, things will not go
ka-boomy if you don't have the actual definition of struct clockframe
before including systm.h.
kernel config option CPU_XSCALE_PXA2X0 is now obsoleted by
CPU_XSCALE_PXA250 and CPU_XSCALE_PXA270. If both of them are defined,
CPU is determined run-time.
and install ${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-disklabel,
${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-fdisk by "reaching over" to
the sources in ${NETBSDSRCDIR}/sbin/{disklabel fdisk}/.
To avoid clashes with a build-host's header files, especially on
*BSD, the host-tools versions of fdisk and disklabel search for
#includes such as disklabel.h, disklabel_acorn.h, disklabel_gpt.h,
and bootinfo.h in a new #includes namespace, nbinclude/. That is,
they #include <nbinclude/sys/disklabel.h>, <nbinclude/machine/disklabel.h>,
<nbinclude/sparc64/disklabel.h>, instead of <sys/disklabel.h> and
such. I have also updated the system headers to #include from
nbinclude/-space when HAVE_NBTOOL_CONFIG_H is #defined.
This code takes no advantage of any 'new' features provided by
architecture 6 devices (such as physically tagged caches or new
MMU features), and basically runs the chip in a 'legacy v5' mode.
distinction between signalling NaNs and quiet NaNs back into the
machine-dependent headers; treat the implementation of __nanf in the
same spirit.
IEEE 754 leaves the distinction between signalling NaNs and quiet NANs
to the implementation, and unlike our headers used to suggest they're
not identical in the interpretation of the fraction's MSb; in due
course, make those of hppa, mips, sh3, and sh5 reflect reality.
to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz
supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to
bus_dmamap_create when the dmamap is unloaded.
preprocessor hackery. If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state. Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.
Add support for breakpoints set in Thumb code and hand them off to
GDB as required.
If supporting architecture 5, enable Thumb code support.
Note: we could probably enable this for 4T processors as well, but
getting interworking right is much more tricky.
architecture defines passed from the compiler.
Define RET and RETc macros for return and conditional return. If BX is
available in the current instruction set then make use of it.
Note: these really are from the compiler's -march/-mcpu flags, not
from the kernel config, so they can be relied on in user space.
yamt