Commit Graph

11 Commits

Author SHA1 Message Date
scw 84c17a8163 Enable alignment faults on arm32 for both kernel and userland.
If COMPAT_15 and EXEC_AOUT are defined, support per-process
alignment checking where AFLTs are always enabled when running
kernel code and userland ELF binaries, and dynamically disabled/
enabled when switching to/from a.out binaries. This is necessary
in order to execute older a.out binaries, where gcc made
deliberate use of misaligned loads under certain circumstances.
2003-10-25 19:44:42 +00:00
scw 9be5d4cbe9 Document the need for pcb32_r8 to be quad-aligned, now that cpuswitch()
uses Xscale's "strd" instruction.
2003-10-13 21:46:39 +00:00
thorpej c8bed530ac Remove #ifdefs supporting the old pmap, switching fully to the new. 2003-05-21 18:04:42 +00:00
scw 41a1932e58 Add the generic arm32 bits of the new pmap, contributed by Wasabi Systems.
Some features of the new pmap are:

 - It allows L1 descriptor tables to be shared efficiently between
   multiple processes. A typical "maxusers 32" kernel, where NPROC is set
   to 532, requires 35 L1s. A "maxusers 2" kernel runs quite happily
   with just 4 L1s. This completely solves the problem of running out
   of contiguous physical memory for allocating new L1s at runtime on a
   busy system.

 - Much improved cache/TLB management "smarts". This change ripples
   out to encompass the low-level context switch code, which is also
   much smarter about when to flush the cache/TLB, and when not to.

 - Faster allocation of L2 page tables and associated metadata thanks,
   in part, to the pool_cache enhancements recently contributed to
   NetBSD by Wasabi Systems.

 - Faster VM space teardown due to accurate referenced tracking of L2
   page tables.

 - Better/faster cache-alias tracking.

The new pmap is enabled by adding options ARM32_PMAP_NEW to the kernel
config file, and making the necessary changes to the port-specific
initarm() function. Several ports have already been converted and will
be committed shortly.
2003-04-18 11:08:24 +00:00
thorpej 20c4b7b844 Change pcb32_pagedir to a paddr_t (after all, it's used as a paddr_t
everywhere in the code).
2003-02-23 23:40:01 +00:00
bjh21 a531a4ae8e Undo recent cpu_switch register usage changes in order to decrease nathanw_sa
merge pain.
2002-10-19 00:10:53 +00:00
bjh21 3d1b6867f0 In cpu_switch(), stack more registers at the start of the function,
and hence save fewer into the PCB.  This should give me enough free
registers in cpu_switch to tidy things up and support MULTIPROCESSOR
properly.  While we're here, make the stacked registers into an
APCS stack frame, so that DDB backtraces through cpu_switch() will
work.

This also affects cpu_fork(), which has to fabricate a switchframe and
PCB for the new process.
2002-10-18 21:32:57 +00:00
bjh21 a7385c575f Move curpcb into struct cpu_info in MULTIPROCESSOR kernels. 2002-10-12 12:20:08 +00:00
thorpej 15c76e3c84 - Move more contents of various <machine/vmparam.h> files into
<arm/arm32/vmparam.h> (mostly the stuff that's tied to the pmap
  implementation).
- Since the MMU definitions in pte.h are specific to ARM processors
  that support 32-bit mode, move pte.h to <arm/arm32/pte.h>.
- Make the Netwinder startup file build again (use PT_B|PT_C, rather
  than PT_CACHEABLE, since the latter expands to a variable these days).
2001-11-23 17:39:03 +00:00
toshii 7c9e82d6e3 Don't define pcb_* register macros.
pcb_sp macro conflicts with sys/netinet6/ipsec.c.
2001-09-09 10:33:42 +00:00
matt 7ce6450eac Add a merged <pcb.h> for arm26/arm32. 2001-09-03 19:20:27 +00:00