Qlogic controller driven by this chipset. If they don't want the verbosity,
don't compile a DIAGNOSTIC kernel.
Major amount of mailbox command rewrites- hopefully should fix some of the
outstanding PRs.
Change header to note that this is no longer maintained at NASA/Ames.
Correctly account for F-port vs. F-port (no FLOGI_ACC) topologies.
Make sure we get a port database entry for the fabric name server.
Preserve fabric logins if the device didn't change across fabric
or port database changes, or the device has already logged into
us (e.g., for target/initiator dual role devices like Veritas
SANbox). Propagate class 3 service parameter changes where devices
can change roles.
Fix all occurrences of setting a sendmarker so that setting it
for one bus on dual bus cards doesn't wipe a pending sendmarker
for other busses on the same card :-;.
Comments added and clarifications made in some of the target mode code.
turning back on fast posting!). Redo fabric (re)login loop- don't try
and log out ports that haven't been logged in. Do correct target id
shuffling so we just always find the target ID we want. Add in support
for > 12 byte commands for parallel SCSI. Handle some Dual Bus reset
stuff. Finally fix ABORT COMMAND to use the right 16 bit order of the
handle to abort.
generateion parallel SCSI cards (1240/1080/1280/12160). Split up nvram
reading routines to be more readable. Fix topology reporting- 2200 has
connected topology in mailbox 6 when you're done getting your loop id
(supported: Private Loop (NL Port), N-Port, F-Port, FL-Port). The 2100
doens't report this, but we can synthesize it to be either NL-Port or
FL-Port. Add in some connection mode async events.
which we claim we've seen the loop up at least once so
that we don't hang forever coming up. Add in the basics
for MI target mode stuff. Force the outer layers to deal
with a FCP response coming back that has a CHECK CONDITION
but no sense data.
isp_fastpost_complete function to include a handle. Do some
isr register debouncing. Use new inline functions for xflist
handle storage. Remove isp_dumpxflist function. Do some fixups
of NVRAM from some broken cards. Use Full Login after LIP option
for FC cards if f/w < 1.17 - there's a f/w bug that causes the
port database to not be actually refreshed for local loop devices!
Do the appropriate endian swizzling for the ICB. Ditto for SNS structures
(these are no-ops until UltraSparc PCI needs them).
(e.g., the 1240). Include the new 1080/1240 NVRAM layout reading code. Some
moderately significant mailbox changes were necessary also to accomodate a
second channel.
board versions with no BIOS. Separate mailbox interrupts from
IOCB interrupts. Read OUTMAILBOX5 while RISC_INT is active- not
after you clear it (potential race condition). Clear out older broken
BIG_ENDIAN goop. Don't negotiate narrow/async for LVD busses at startup
if already in LVD mode. Note usage of presumptive 1040C revision. For
all the LIP, PDB Changed, Loop UP/DOWN async events, mark fw state
as unknown as well as marking the need to do a getpdb on targets- after
a LIP for certain the f/w has to do PRLI/PLOGI for all targets again
and marking f/w state as unknown gives us a fighting chance to (start
to) hold up for that to complete.
Use fast memory timing NVRAM parameter. Clean up and fix establishment
of default target parameters. Don't use NVRAM if are flagged as not to
do so (I had a busted NVRAM setup which I couldn't edit that enabled SYNC
mode but disabled disconnect/reconnect and wide!!). Fix delays after
resets. BUS resets not done in isp_init anymore- relegated to OS
specific outer layers. Fix a buglet where you can get in a loop for
a NULL xs in the completion list in isp_intr. Add in some defines that
can disable fast posting. Add in code for Loop Up/Loop Down events that
call into the outer layers as to what to do.
the startup code. Implement a call to outer framework function so that
asynchronous events can be handled (e.g., speed negotiation, target mode).
Roll internal release tags.
+ Enable FIFO bursts, but also detect bogus 1040A with busted FIFO.
+ Use new MEMZERO crossplatform define.
+ Handle RQCS_QUEUE_FULL status case and let upper layer parse SCSI ststus
byte if nonzero (should be 0x28- Queue Full status)
+ Fold ISP_NVRAM_FIFO_THRESHOLD_128 into isp_fifo_threshold tag.
a slightly different fibre startup (print ALPA now too). Change
the way that return values from dma setup is done. Make debug messages
out of some queue overflow situations. Turn PORT LOGGED OUT into
Selection Timeout equivlaent. On isp_restart actions don't blow off
the commands with HBA_BOTCH (XS_DRIVER_STUFFUP) - set them with HBA_BUSRESET
(which is defined as XS_DRIVER_STUFFUP until someone decides whether
the suggested change to the midlayer NetBSD is worthy of inclusion).
us to call isp_reset/isp_init internally with impunity.
Rename isp_phoenix to isp_restart and make it global. Clean it up a tad.
If we get an ASYNC_SYSTEM_ERROR code in isp_intr, call isp_restart and
return- the f/w is toasted at this point (usually), so we have to bring
things back to a known state.
In isp_mboxcmd, when we don't see the HOST_INT bit go clear, try and
find out if the isp is trying to tell us something and try again. This
may avoid a potential deadlock where the previous mailbox command hasn't
been cleared by the ISP.
In isp_init don't try and get device parameters if we already have them-
this typically doesn't work if we're in the middle of an isp_restart.
There is one change of note- build a list of completing commands in
ispintr and then say you're done- this avoids some re-entrancy issues
that had surfaced.
(currently only CD-ROM drives on i386). The sys/dev/scsipi system provides 2
busses to which devices can attach (scsibus and atapibus). This needed to
change some include files and structure names in the low level scsi drivers.
clock rate for this board on Alpha/PCI systems. Under x86/PCI, the
board f/w will correctly tell you "I'm running at 60Mhz", so the code
that preserved that across a board reset (which would drop the chip
back to 40Mhz) worked fine. On the 8200, the chip was saying "I'm 40Mhz"-
which wasn't true. This turned out to be okay as long as you didn't have
any FAST or UltraFast targets- In fact, setting the chip to 40Mhz allowed
you to run up to 8Mhz SCSI. Unfortunately you die bigtime on the devices
that go faster than that. The fix here is to only use what the chip tells
you the clock rate is in the cases you don't really know (sbus is the
only case where this could be different, although with 66Mhz PCI coming up,
this may change).
mjacob