NetBSD

Commit Graph

Author	SHA1	Message	Date
scw	1d6e3e9f5a	Check and clear the HT bit in strtc_clock_read(), not just strtc_clock_write() otherwise we end up reading the date/time of the previous powerfail event.	2004-11-24 14:46:18 +00:00
briggs	e1aa8a2dd7	Handle the Halt Update Bit (HT), stored in the Alarm Hour register. This bit will be set if the clock lost power (and may therefore not have the correct time). If this bit is set, the stored time does not advance. So, when setting the clock, if that bit is set, we simply clear it. It might be nice in some applications to pass the information up a few layers if the bit is set when we read the register initially. For now, though, we ignore it.	2004-01-20 19:12:54 +00:00
thorpej	2652188cc4	New generic I2C framework. Supports bit-bang and "intelligent" I2C interface controllers (of varying intelligence levels). Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford, with some modification by me.	2003-09-30 00:35:30 +00:00

Author

SHA1

Message

Date

scw

1d6e3e9f5a

Check and clear the HT bit in strtc_clock_read(), not just strtc_clock_write()

otherwise we end up reading the date/time of the previous powerfail event.

2004-11-24 14:46:18 +00:00

briggs

e1aa8a2dd7

Handle the Halt Update Bit (HT), stored in the Alarm Hour register.

This bit will be set if the clock lost power (and may therefore
not have the correct time).  If this bit is set, the stored time
does not advance.  So, when setting the clock, if that bit is set,
we simply clear it.  It might be nice in some applications to pass
the information up a few layers if the bit is set when we read the
register initially.  For now, though, we ignore it.

2004-01-20 19:12:54 +00:00

thorpej

2652188cc4

New generic I2C framework. Supports bit-bang and "intelligent" I2C

interface controllers (of varying intelligence levels).

Contributed by Wasabi Systems, Inc.  Primarily written by Steve Woodford,
with some modification by me.

2003-09-30 00:35:30 +00:00

3 Commits