To use it on EM64T CPUs supporting the EST CPUID feature. Note that
some CPUs still don't work with this driver, like Xeon or Pentium 4.
Move the p[34]_get_bus_clock functions into its own file,
intel_busclock.c and remove this code from i386/identcpu.c.
Tested on i386 by myself and amd64 by Tonerre.
initialize it explicitly in identifycpu() (before cpu_configure(9))
because after yamt-idlelwp merge savectx() is called before
cpu_configure(9) and it requires fputype initialized properly,
otherwise a kernel fails in savectx() if a machine doesn't have an FPU.
Mostly taken from mvme68k.
Tested on (not yet integrated) mac68k SONIC Ethernet with MI dp83932.c.
XXX: should we also enable _pmap_set_page_cache{able,inhibit}()
XXX: functions in m68k/pmap_motorola.c for BUS_DMA_COHERENT support?
subroutine to get more proper backtrace on ddb(4).
In the previous code it scans backwards from the current PC
for the end of the previous subroutine and checks "jr ra" or
"jr k0" instructions, but it often fails because gcc is
so aggressive nowadays as to reorder instruction blocks
to create efficient code path by branch predict etc. and
"jr ra" is not always located at the end of subroutines.
No objection on port-mips.
for LOCKDEBUG, mutex_destroy() the cpu0 spc_lwplock with the global
cpuinfo VA, and re-mutex_init() it with the per-cpu address that is only
now available. for non-boot cpus, be sure to also initialise curlwp to
the idle lwp.
xcall(), pmap_quiet_check(), pmap_pmap_pool_ctor(), pmap_pmap_pool_dtor(),
and pmap_enu4m(): don't care about cpus that have not been attached yet.
by our native bootloader.
- Restore lwp0.l_cpu (which is required for curcpu()) and
cpu_info_store.ci_curlwp after clearing BSS in case
a kernel is loaded by the firmware directly since these
values are in BSS and initilized before mach_init() is called.
(actually they are restored in mips_machdep.c:mips_vector_init()
but we use curcpu() earlier than that point)
Fixes silent hang right after boot on cobalt.
meesing with the TLB. That would usually show up as misterious kernel
crashes under heavy load.
Prettify the code while here so that traversal of the memory mapped
TLB arrays looks congruent in all functions.
Fixes PR 34706
