Commit Graph

1290 Commits

Author SHA1 Message Date
cgd c0ac8bae67 GC alpha's ECOFF_TOOLCHAIN make variable, and related bits. Nobody
should be using an ECOFF toolchain on NetBSD/alpha any more.
1998-03-28 00:50:41 +00:00
thorpej 4893f22399 Much more sane boot block builds, from Chris Demetriou. 1998-03-28 00:21:35 +00:00
thorpej a95651eaea Add a PMAP_KERNEL_PTE() macro that returns the PTE for a given KVA. If
DEBUG, this performs a table walk.  Othwise, the Virtual Page Table is
used.  Use this macro in a few places where this was done by-hand.

Make vtophys() use PMAP_KERNEL_PTE().  In non-DEBUG cases, this is
a fair bit faster.
1998-03-27 19:18:04 +00:00
ross 2ce8cda3e5 Get rid of a /* in a comment. 1998-03-27 01:17:18 +00:00
thorpej b1e15c2005 Add some robustness to pmap_alloc_physpage(): Instead of panic'ing if
we can't get a page, find an inactive pmap and pmap_collect() it,
freeing up a few pages.  Go ahead and die if we can't allocate a page
after 5 tries.
1998-03-27 00:52:43 +00:00
thorpej b86884a71a Give pmap_collect() some substance: when called, a process is being
swapped out, so remove all of the physical mappings the process has
in order to free up the page table pages.

Since the pmap module is allowed to "forget" mappings, pmap_collect()
may be called in other situations where the memory situation is desperate,
although it's more likely that the pages will simply be needed again the
next time a process runs.
1998-03-26 22:18:36 +00:00
thorpej 531db9e0d3 Sanity check the virtual addresses in the kernel and non-kernel cases
of pmap_enter() (and pmap_kenter_*()).  Remove diagnostic check for
kernel pmap in pmap_alloc_asn().
1998-03-26 19:06:28 +00:00
thorpej 040f7cbc70 Remove references to pmap.old.h - It should have just been pmap.h, but
that isn't necessary, either, since <vm/vm.h> is already included.
1998-03-26 18:17:13 +00:00
thorpej c4ba627afc Kernel config file for bishop.nas.nasa.gov and ripley.nas.nasa.gov,
AlphaStation 500 and AlphaStation 600, respectively.
1998-03-26 03:00:36 +00:00
thorpej 9234f2450b Enable DDB history, netbsd.gdb. 1998-03-26 02:58:48 +00:00
thorpej 6111783e61 if NEW_SCC_DRIVER, 3000/300 and 3000/500 aren't PROM console candidates. 1998-03-26 02:53:21 +00:00
thorpej a9e071bef5 defopt NEW_SCC_DRIVER 1998-03-26 02:52:43 +00:00
thorpej 1282aca230 Add options UVM, PMAP_NEW, and NEW_SCC_DRIVER. 1998-03-26 02:51:46 +00:00
thorpej 73f1a02583 If NEW_SCC_DRIVER is defined, the 3000/300 and 3000/500 are not
PROM console candidates.
1998-03-26 02:45:34 +00:00
thorpej 7b4da708cc Add support for attaching a zstty as the console, conditional on
NEW_SCC_DRIVER.
1998-03-26 02:43:22 +00:00
thorpej 4a4bccc923 Remove references to NEW_PMAP. 1998-03-26 02:21:46 +00:00
thorpej 76ba34c797 Remove references to "new_pmap". 1998-03-26 02:19:02 +00:00
thorpej 456b3df281 Remove the Mach 3 pmap from the tree, replacing it with the contents of
pmap.old.<whatever>.  To see the history, look at the corresponding
pmap.old.<whatever> file.
1998-03-26 02:18:03 +00:00
thorpej 3ac5a77c70 Make pmap_kremove() deal with mappings entered with pmap_enter() as well.
Prevents stale PV entries from lingering around.  Fixes a nagging
"kernel stack not valid halt" I was seeing with PMAP_NEW.

Idea from Chuck Cranor.
1998-03-25 22:52:28 +00:00
mjacob db6aafad0b With new pmap stuff, the need for MSS3 goes away. 1998-03-25 18:33:41 +00:00
ross 3786a63843 1. Always link at the high address, now that we can use free ram below
the kernel on most platforms, including all of the entry-level platforms.
2. Kill the comments and options for load address selection.
3. Kill the default -g.
1998-03-25 02:16:41 +00:00
thorpej e6cf334f5c Keep a few things that reference kernel variables out of the namespace.
Add a check to see if libkvm is using this file.
1998-03-25 00:44:34 +00:00
thorpej 49408401a3 In pmap_destroy_lev1map(), fix a problem where the pmap's ASN wouldn't
be invalidated if the pmap is not active.  A rare thing (in fact, I'm
having trouble thinking of a scenario where it would happen), but it was
incorrect, nonetheless.
1998-03-24 22:02:44 +00:00
thorpej ea074f229a cdev_decl the "zs" device (which is really zstty). 1998-03-24 05:17:14 +00:00
thorpej 0105ff6f53 Update my DEC 3000/400 kernel config to reflect usage of the MI SCC driver.
Do not try this at home.  Caution: hot coffee is hot.
1998-03-24 05:16:30 +00:00
thorpej db00f6f709 Define attachments for the MI SCC driver - only hooks up to ioasic
for now.
1998-03-24 05:15:07 +00:00
thorpej a26a53fbbc Slight hack to allow the MI SCC driver to be used at cdev major 15
for testing purposes.  Normal kernels still get the Alpha-specific
SCC driver.
1998-03-24 05:13:59 +00:00
thorpej ee83014c4d Initial mostly-working ioasic attachment for the MI 8530 SCC driver. It is
enough to use as a console on my DEC 3000/400 (connected to a VT-520
terminal).

XXX The MI SCC driver needs serious changes to handle platforms which
have muliple SCC attachments (e.g. the Alpha port, which has an ioasic
attachment for TurboChannel systems and a gbus attachment for TurboLaser
systems).

XXX The MI SCC driver also needs changes to deal with the wacky (to put
it mildly) way the chips are wired up on the ioasic (on both TC Alphas
and DECstations).  These are going to come along later.
1998-03-24 05:12:00 +00:00
mjacob 4ccb969d0b Okay, handle the ALLOCNOW case by doing the appropriate adjustments
up front. Do the spacing arithmetic slightly differently.
1998-03-23 07:51:25 +00:00
mjacob 8e5970917e Redo it slightly so that S/G now appears to work a bit better. This
version has 2GB direct map starting at 2GB, and either 256MB or 1GB
S/G starting at 1MB. I've done *some* testing on this, but I'm not
quite happy with it yet.
1998-03-23 07:42:40 +00:00
mjacob 88c34f6f5f Spaicing for 32 bit ptes (dwlpx only, really) is 0x20, not 1 1998-03-23 07:09:12 +00:00
mjacob 66194d05bc Do a more complete job of figuring out what kind of DWLP? we have- figure
out how much s/g ram is available. Can't really use the 128K entry S/G
ram yet- but I'll fix that later. More importantly, add in a dwlpx_iointr
handler that will try and figure out what the DWLPX error is and at
least print out what is happening- I actually found it useful in S/G
entry debugging as it could tell me that I had some bad S/G entries.
1998-03-23 06:38:10 +00:00
mjacob 51ba315ba2 Slightly restructure interrupt handling to accomodate the addition
of a dwlpx_iointr vector.
1998-03-23 06:32:39 +00:00
mjacob 7c83bc0da6 Prepare for handling multisized S/G maps. Specify dwlpx_iointr function. 1998-03-23 06:31:54 +00:00
jonathan d3d99a28c9 Update #ifdef'ed-out changes from pmax :
* Add more #ifdef pmax/#endif, #ifdef alpha/#endif where appropriate.
    Config and heade files need more work (or replacement)
  change TK_NOTYET to HAVE_RCONS
  change commented-out /* && cn_tab.cn_screen */ to && raster_console()
  * Add DDB hooks.
  * Note where Alpha console ignores carrier on consoles.
  * Add pmax-derived console tty-size code inside HAVE_RCONS
  * Fold in gross pmax rcons-input hooks, inside HAVE_RCONS

Untested, but whitespace/ifdef only,  cross-compiles OK,
preprocessing shows no significat differences (famous last words)
1998-03-22 08:24:52 +00:00
thorpej a5260cbda0 Use atomic set/clear bits in pmap_activate()/pmap_deactivate(). 1998-03-22 07:27:54 +00:00
thorpej fcfe2f1539 Implement a set of `atomic' (using load-locked and store-conditional)
operations.  Initial set includes:

alpha_atomic_setbits_q()	set bits in a quad
alpha_atomic_clearbits_q()	clear bits in a quad
1998-03-22 07:26:32 +00:00
thorpej 9db8ae93c8 - The pmap now includes support for ASNs. We no longer need to flush
the TLB and I-cache in the SWITCH_CONTEXT macro.
- Right after switching to proc0's newly-created context at startup time,
  flush the TLB and I-cache; this is the only place where it's not done
  automatically.
- Fix a nasty bug in a critical section of cpu_switch(); change the
  pmap_activate -> SWITCH_CONTEXT -> pmap_deactivate sequence to
  pmap_deactivate -> pmap_activate -> SWITCH_CONTEXT.  This prevents
  erroneously marking a pmap inactive if switching to a process that
  shares it's address space (and thus its pmap) with the oldproc!  Noticed
  by Chris Demetriou.
1998-03-22 05:46:02 +00:00
thorpej c0cc1ed476 Implement support for Address Space Numbers, greatly reducing the number
of TLB and I-cache flushes, significantly speeding up context switches.

Once again, many thanks to Chris Demetriou and Ross Harvey for code
review and debugging assistance!
1998-03-22 05:41:37 +00:00
thorpej a8d86e5a7c Replace PMAP_ASNGEN_INVALID with PMAP_ASN_RESERVED. 1998-03-22 05:39:50 +00:00
mjacob 86b6520e41 more TS_WOPEN to tp->t_wopen changes 1998-03-21 23:36:19 +00:00
mycroft 0dae91d9af Eliminate uses of TS_WOPEN in hard-wired devices. 1998-03-21 22:52:59 +00:00
mjacob 34f87569b9 add some error defintions 1998-03-21 22:02:42 +00:00
thorpej 66d8f5b544 sync systypes w/ <machine/rpb.h> 1998-03-20 21:48:21 +00:00
thorpej 63c73f94e3 Add a few more systypes. 1998-03-20 21:48:03 +00:00
thorpej 0f95ffdc1d Nuke swpctxt(); it's only used by the Mach pmap, which we will only ever
use for reference.
1998-03-19 06:44:25 +00:00
thorpej 003c50d1d5 Add a macro to invalidate the TLB for a given pmap/va pair. TLB
invalidation algorithm:

	if (old mapping had PG_ASM set || pmap is active) {
		TIBS(va);
		if (also sync I-stream)
			imb();
	}

The check for "old mapping had PG_ASM" will get all kernel mappings (since
kernel mappings always have PG_ASM set).

This allows us to remove the bogus check for the kernel pmap in
active_pmap() - do so.

Use the new TLB invalidation macro whenever such action is needed.
1998-03-18 23:55:25 +00:00
thorpej 15adb17803 Eliminate the last argument from pmap_remove_mapping(); it makes its own
decisions about TLB invalidation.
1998-03-18 23:11:44 +00:00
thorpej 7ee4af11a7 Change active_pmap() to use the CPU mask (XXX and check for kernel pmap
as well, until some other changes are made).  Nuke active_user_pmap(),
and change the places that used it to use active_pmap() instead (as well
as make some DIAGNOSTIC consistency checks).
1998-03-18 22:50:50 +00:00
thorpej 605472f676 Optimize out a TLB invalidation in a common case of pmap_enter(): if
the PTE was previously invalid, no TLB invalidation is necessary because:

	(1) when a PTE is invalidated, its entry is flushed from the
	    TLB

	(2) the PALcode won't install an invalid PTE into the TLB.
1998-03-18 22:13:58 +00:00