kmem_map (the VA space is allocated from kernel_map).
In both bus_mem_map() and bus_mem_unmap(), adjust some arithmetic to
avoid wasting a page of VA space per call to bus_mem_map().
While I'm here, convert driver to use <machine/bus.h> and the new PCI
I/O space interface (the new PCI interrupt interface was already in-use).
Also, correct a "corrected" printf.
* Make 2nd and 3rd args timespecs, not timevals.
* Consistently pass a Boolean as the 4th arg (except in LFS).
Also, fix ffs_update() and lfs_update() to actually change the nsec fields.
bits that tell the driver not to expect parity from those targets.
XXX: For now, it is up to MD code to set this mask. Eventually,
XXX: we should identify targets first (without demanding parity)
XXX: and then use a new "SCSI quirk" to set the right bit.
This should reduce the possibility of a panic when unable to allocate
a new pv_entry under low memory conditions.
Changed a couple of kmem_free() calls to kmem_free_wakeup() as in the
hp300 pmap.c.
-Wall cleanup: unused variable when M68060 not defined.
documentation I have calls them, and update for new definitions in
sys/exec_ecoff.h. Also, fix ECOFF_SEGMENT_ALIGNMENT macro so that it
actually returns the right alignment.
documentation I have calls them. This makes it easier to simulate
a 'normal' ECOFF environment. Add an 'ecoff_exechdr' structure which
includes the filehdr and aouthdr. (That idea taken from the Mach header
formerly used by the Alpha boot blocks.) Simpify the macros used to get
various bits of information, and make most of them take pointers to
the exechdr structure rather than individual pointers to the filehdr
and/or aouthdr.
* for the M68060 part: store buffer and branch target cache aren't
enabled yet (this needs cleanup of lots of locore.s code which is a
maze of little passages, all a little different) (and it wasn't yet
tested in an accellerated Amiga, only in the DraCo).
I've included a workaround for 2 of the CPU bugs in chips with Masks
1F43G and earlier, but didn't bother to deal with the can of worms
in the [0-3]D11W chips. Be sure to get "68060 rev. 1" or more
reported at kernel startup time, or at least mention it (or the mask
revision, if available) when reporting problems.
* for the DraCo: only machines with a CIA timer.
I assigned machine id 32000+nn (0x7Dnn), where n is the machine
readable Quicklogic custom chip revision (also printed at boot
time). "Guaranteed to work" up to rev. 3, newer DraCo's aren't
guaranteed to have any CIA (we don't have a driver for the new timer
yet).
Supported are:
- MF-II keyboards on the native interface and A3000 keyboards via
the CIA.
- builtin SCSI interface (yet another instance of siop)
- CIA timer.
- Zorro II devices which don't do DMA (don't get mapped to Zorro II
address space in the DraCo)
- "local bus" devices which are autoconfigured by the boot rom
(should be all); only an Altais driver is there (looks like a Retina Z3)
Not yet supported are:
- native timer of newer machines.
- Real Time Clock.
- serial, parallel + floppy on the SuperIO chip (that is also: no mouse)
XXX You need an enhanced boot loader, which will committed in a few days.
XXX std.draco should and will go away.
mark