NetBSD

Commit Graph

Author	SHA1	Message	Date
uch	46fb1c9fce	initialize pciirq.	1999-12-13 15:42:05 +00:00
thorpej	7f28924acc	If we see a bogus $PIR table entry, just ignore it. The MPIIX has entries for the IRQs used by the IDE controller, which aren't really PCI IRQs (they're ISA compat IRQs), and thus have link values that don't make a lot of sense.	1999-11-17 18:55:15 +00:00
thorpej	2026e5f71b	PCI interrupt routing fixup code, from UCHIYAMA Yasushi's PCI BIOS patches, cleaned up and heavily reworked by me. Basic algorithm is the same, although the code structure is now quite different. Main differences: - Initialization path is totally different. - We use the `compat router' information, if present, to determine which PCI ICU driver we should use. - Fixup configuration headers on devices not on bus 0.	1999-11-17 01:20:38 +00:00

Author

SHA1

Message

Date

uch

46fb1c9fce

initialize pciirq.

1999-12-13 15:42:05 +00:00

thorpej

7f28924acc

If we see a bogus $PIR table entry, just ignore it. The MPIIX has

entries for the IRQs used by the IDE controller, which aren't really
PCI IRQs (they're ISA compat IRQs), and thus have link values that
don't make a lot of sense.

1999-11-17 18:55:15 +00:00

thorpej

2026e5f71b

PCI interrupt routing fixup code, from UCHIYAMA Yasushi's PCI BIOS

patches, cleaned up and heavily reworked by me.  Basic algorithm is
the same, although the code structure is now quite different.

Main differences:
- Initialization path is totally different.
- We use the `compat router' information, if present, to determine which
  PCI ICU driver we should use.
- Fixup configuration headers on devices not on bus 0.

1999-11-17 01:20:38 +00:00

3 Commits