Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
101,515 Commits 606 Branches 0 Tags 3.1 GiB
60bff6ed9c
Commit Graph

32783 Commits

Author SHA1 Message Date
scw
60bff6ed9c Make sure to sign-extend PTEH/PTEL values before writing to the TLBs. 
Make sure to zero-extend PTEH/PTEL values before comparing with TLB entries.
Don't use the two LSBs of CTC when choosing a "random" TLB entry to replace;
seems like these bits are always zero on this CPU.
 2002-08-30 13:54:16 +00:00
scw
7da5ef1b84 Delete the CPU_CTB1 option; it was never used. 
Add the SH5_INTC_IRL_MODE_INDEP option, to correctly configure
the interrupt controller for Cayman.
 2002-08-30 11:25:09 +00:00
scw
877f6b7143 Add some options: 
- SH5_SIM, as we're targetting the simulator.
 - KERNEL_IPT_SIZE, as we want to reduce startup time.
 - DDB. Yes, DDB inside a debugger/simulator. :)
 2002-08-30 11:23:12 +00:00
scw
aaa2f7e5ca When running on the simulator, assume there is 16MB of "RAM". This 
greatly reduces startup time.
 2002-08-30 11:06:03 +00:00
scw
1fd693d5b5 In the IRL1 interrupt handler, you need to read the Interrupt 
Source Register#0, Steve. Not the Board Operating Mode register. Duh.
 2002-08-30 11:03:25 +00:00
scw
de63e7f1e4 Swap the IRL numbers for FEMI and SUPERIO, after reading the Cayman 
docs a bit more closely...
 2002-08-30 10:59:39 +00:00
scw
5cc4fe3194 Slight tweak to how the sm(4) driver attaches to superio. Also, just 
use the regular bus tag for sm(4) instead of superio's "special" ISA
bus tag.
 2002-08-30 10:57:05 +00:00
scw
ec32f137a2 Add byte_swap.h 2002-08-30 10:50:55 +00:00
scw
5bb390ef0d Re-arrange the endian/byteswap headers a bit by splitting off the 
byte swap code into a separate file and renaming them.
Fix a typo which prevented ntohX and htonX macros DTRT for
little-endian mode.
 2002-08-30 10:50:06 +00:00
scw
7958409b89 If running on the simulator, use a much lower buzz-loop count when 
waiting for ACKs from the DTF host, otherwise the simulator waits
way too long for the initial open-ACK (which never seems to arrive,
even though things work fine afterwards).
 2002-08-30 10:45:31 +00:00
scw
986af15320 Setup the IRL[0-3] mode according to what the kernel config file specifies. 2002-08-30 10:41:24 +00:00
scw
14b4efaf64 If running on the simulator, skip the pbridge probe. 2002-08-30 10:39:26 +00:00
scw
f8f7664ef6 Defflag/param some options for: 
- selecting Simulator/ST50 Debugger targets,
  - hard-coding the cpu speed instead of using the speed detection code,
  - changing the default kernel IPT size,
  - selecting the IRL[0-3] mode to configure in the interrupt controller.
 2002-08-30 10:29:35 +00:00
scw
873939f14a Fix a typo which resulted in a bus_space_write_stream_4() where it 
should have been bus_space_write_stream_2().

The sm(4) driver gets a bit further now.

While I'm here, g/c a debug printf accidentally commited last time around.
 2002-08-29 18:11:07 +00:00
briggs
37019d791a Use generic_bs_sr_4 for bus_space_set_region_4. 2002-08-29 17:29:34 +00:00
briggs
043080912d Add generic_bs_sr_4 2002-08-29 17:27:48 +00:00
scw
1256340461 Add the frame pointer (r14) to the list of registers to save in 
the pcb during a context switch.
 2002-08-29 16:04:10 +00:00
hannken
ffd7a8c585 Convert to new device buffer queue interface. 
Tested with help from Hauke Fath <hauke@Espresso.Rhein-Neckar.DE>
on Performa 600 and Quadra 700.
 2002-08-29 14:15:37 +00:00
hannken
6243846e46 Get rid of error -66 (sector not found). 
From Hauke Fath <hauke@Espresso.Rhein-Neckar.DE>
 2002-08-29 09:26:23 +00:00
leo
eeb4fd145c defopt SERCONSOLE 2002-08-29 08:28:58 +00:00
simonb
284c3f4875 It's the gt64120, not the gt62140. 2002-08-29 08:02:35 +00:00
chs
d6988a7eb6 Add `audio* at uaudio?' so that uaudio is actually useful. PR 15610. 2002-08-29 04:54:47 +00:00
chs
d8a392f619 wrap Debugger() in #ifdef DDB. fixes PR 15881. 2002-08-29 04:43:43 +00:00
thorpej
d9374670ba Put PERFCTRS under "Development and Debugging options". 2002-08-29 02:25:22 +00:00
thorpej
12f448527a Don't need SOSEND_LOAN here anymore. 2002-08-29 02:22:46 +00:00
scw
9af86f9bf3 Oops, got the source operands for an "andc" reversed. 
This gets the hardware interrupt event handler working.
 2002-08-28 21:05:25 +00:00
gmcgarry
14b302311d RAS support for i386. 2002-08-28 09:47:15 +00:00
gmcgarry
d6109af7cb RAS support for m68k. 2002-08-28 08:56:59 +00:00
gmcgarry
1a8058823b RAS support for MIPS. Tested on R3000. 2002-08-28 08:34:06 +00:00
matt
05980fc1da Move bufpages to top of kernel vm space. allocate dead zone after buf 
pages so that it go larger than > 256MB.
 2002-08-28 06:27:20 +00:00
simonb
b888bfcc0e Remove some commented-out include files. 2002-08-28 02:27:11 +00:00
simonb
993a94e6bc Add the Toshiba TX4927 CPU. 2002-08-28 02:09:29 +00:00
manu
f9889ab068 Correctly map altgr on a french keyboard 2002-08-27 17:54:30 +00:00
thorpej
70b58c9c1e In bounds_check_with_label(), look for the label sector in RAW_PART, 
not "a".
 2002-08-27 17:30:02 +00:00
scw
5cff5c076e Don't need <machine/walnut.h> here. 2002-08-27 12:23:06 +00:00
uwe
082c4cf032 Make sun ports use common keyboard/firm events related includes 
from dev/sun.
 2002-08-27 09:47:41 +00:00
lukem
fb7bc8541e arch/*/stand stuff should be LDSTATIC=-static and not LDSTATIC?=-static. 
It doesn't make sense to have standalone stuff dynamically linked just
because an end-user uses LDSTATIC="".
 2002-08-27 08:53:14 +00:00
fredb
750d298cb0 Follow AMD's recommendations for programming the uncachable/write-combine 
bits of the K6 cache-control-register: disable the cache; flush the cache;
set the bits; re-enable the cache (all much like programming the pentium
mtrr's). See reference posted to tech-kern; also review there by thorpej.
 2002-08-26 22:36:24 +00:00
chris
e660a1b7e6 Add byte_swap.h for cats, this creates the /usr/include/machine/byte_swap.h 2002-08-26 13:35:16 +00:00
scw
2ccf86d7da Re-sync with current reality. 
Add options DDB.
Add debug makeoptions.
G/C some unnecessary stuff.
 2002-08-26 11:16:02 +00:00
scw
9bcd736b9d Attach sm(4) at superio, instead of the previous isa bus attachment. 
The latter's probe doesn't pick up the ethernet controller, and the
attach function needs to set MIIF_NOISOLATE.
We attach it at superio mainly because they share the same region of
address space, and the ethernet controller's interrupt is routed
through the superio.
 2002-08-26 11:04:44 +00:00
scw
fe7de4db3f Need <machine/db_machdep.h> 2002-08-26 10:58:38 +00:00
scw
a1fda8f587 Call ddb_init() right after initialising the console. 
We have no symbols at this time (due to lack of a bootloader)
so just hardcode symbol length to zero for now.
 2002-08-26 10:55:39 +00:00
scw
0eb22d79b4 Try to preserve more bits in the status register (e.g. trace/watch). 
Bump the (currently hardcoded) size of onboard RAM to match the Cayman.
 2002-08-26 10:52:13 +00:00
scw
f6e3925495 Set the appropriate Timer Start bit after setting it all up. 2002-08-26 10:48:17 +00:00
scw
aba39b410c Don't forget to initialise 'sc' on entry to the attach function ... 2002-08-26 10:45:55 +00:00
scw
a1ed033a09 Hardcode FEMI base and top addresses, at least until I figure out 
how to interpet VCR.MB_TOP and VCR.MB_BOT in some reasonable way.
 2002-08-26 10:43:44 +00:00
scw
3ad3b8c856 Add MD ddb(4) files. 2002-08-26 10:39:43 +00:00
scw
a57d38854c Save SSR and SPC while in the critical section of an exception. The 
previous behaviour of storing them with SR.BL clear was in breach
of the SH5 documentation.

Make an effort to catch PANIC traps and dump machine state to the console.
 2002-08-26 10:38:52 +00:00
scw
40f78dcc13 Use pmap_map_device() to map device registers. 2002-08-26 10:35:40 +00:00