5 Commits

Author	SHA1	Message	Date
fvdl	795fec2b60	The i82093 spec is unclear about it, but my assumption that the selected ... ioapic register would stick across a read+write appears to be invalid for some ioapics. So, select it again for the mask write.	2003-05-11 14:02:17 +00:00
fvdl	2cd70f0da1	Block level-triggered interrupts at the ioapic if they are deferred. ... Avoids interrupt storms seen on some systems. Many thanks to Stoned Elipot for testing.	2003-05-04 22:01:56 +00:00
fvdl	a33bcafdf1	Redirect some includes to x86/foo.h	2003-02-26 21:28:59 +00:00
fvdl	ae4b76c8d3	New interrupt code. The basic idea behind it is to hide the differences ... in interrupt controllers in struct pic, and try to keep as much common code as possible. At the lowest (asm) level, this is done with CPP macros. The main structure is now struct intrsource, describing an established interrupt line, of any kind (soft/hard local apic/legacy apic/IO apic). For quick masking, there may be a maximum of 32 sources per CPU. Sources can be assigned to any CPU in the MP case, though currently they all go to the boot CPU.	2002-11-22 15:23:35 +00:00
fvdl	26ab868e68	Merge Bill Sommerfeld's i386 MP branch. This code has some known ... caveats, but works quite well in a lot of MP cases, and all UP cases that I have tested. Parts of this will hopefully be reworked in the not-too-distant future.	2002-10-01 12:56:36 +00:00