Commit Graph

936 Commits

Author SHA1 Message Date
thorpej
cc2c493bc4 Use PAGE_SIZE rather than NBPG. 2003-04-02 07:35:54 +00:00
thorpej
c9228c8ddd Use PAGE_SIZE rather than NBPG. 2003-04-02 04:17:50 +00:00
thorpej
86f35f803c Use PAGE_SIZE rather than NBPG. 2003-04-02 02:45:36 +00:00
thorpej
7c0edb9d0e Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for
PowerPC processors.
2003-04-01 23:52:35 +00:00
matt
6a15c68f5d Make sure to turn on the speed knobs in HID0 on the 745x. 2003-03-29 18:18:54 +00:00
matt
2c37db6aec Allow oea_batinit to be called with either the MMU on or off.
(don't reset the BATs if the MMU is off).
2003-03-29 18:09:59 +00:00
matt
b3715c2f6a Add 7450 LRSTK and FOLD bits. 2003-03-29 18:08:42 +00:00
matt
8a5a3a480a Switch/adapt to new bus space infrastructure. 2003-03-18 16:40:18 +00:00
matt
bff46769b9 fix typo in comment. 2003-03-17 23:15:33 +00:00
matt
582f976e54 Add __HAVE_GENERIC_SOFT_INTERRUPT support. 2003-03-17 16:54:16 +00:00
matt
c7b0df67b4 Add CLOCKBASE to opt_ppcparam.h. 2003-03-17 16:53:52 +00:00
matt
5504cc0c26 Use "b" constraint so r0 won't be used. 2003-03-16 06:57:31 +00:00
matt
1d04c635f2 Make the result an early clobber so gcc won't get clever. 2003-03-16 06:56:47 +00:00
matt
8524a72241 Honor PMAP_NC for pmap_kenter_pa. Fix goof in pmap_pte_to_va. 2003-03-16 06:54:46 +00:00
matt
ea542f761a addi is not the same as add. :) 2003-03-16 06:52:39 +00:00
matt
8a37a3ec5d Fix bus_dmamap_sync (add offset to ds->ds_addr when needed).
Add a set of parenthesis to PMAP_NC so it evaluates properly.
2003-03-16 05:37:37 +00:00
matt
640bee3010 Reduce visible globals. (gt_handle is now gt_memh and is only known to
machdep.c, gt_mainbus.c, and extintr.c)
2003-03-15 19:51:48 +00:00
matt
101a152db1 This contains no marvell specific code now. It now completely hides the
underlying PCI MD implementation.  XXX want to move this to
powerpc/include/ someday.
2003-03-15 19:50:31 +00:00
matt
a0b2076415 New generic powerpc bus_space framework. 2003-03-15 08:03:19 +00:00
matt
0f1794e44a Make lint happy and use __asm && __volatile.
manipulate netisr via lwarx/stwcx. to get atomicity.
2003-03-15 07:50:28 +00:00
matt
7ad3fe6e03 When mapping a page with BUS_SPACE_NOCACHE, make sure to flush the
physical page from the data cache.
2003-03-15 07:25:20 +00:00
matt
35962f72c9 s;backside;; and report L2CR_L2DO & L2CR_L2IO 2003-03-15 07:22:46 +00:00
matt
2b8417e488 Add LINTSTUBs and make oea_init() agree with them. 2003-03-15 07:21:02 +00:00
matt
df24bda908 Make lint happy. 2003-03-15 07:19:20 +00:00
matt
d03db36449 Use aprint_normal. Print 2MB L2 sizes with 7410. 2003-03-14 06:27:40 +00:00
matt
e0242aaebc Remove Debugger call. 2003-03-14 06:25:58 +00:00
matt
d50c91e021 Make lint happy by not assigning to casted lvalue. 2003-03-14 06:23:48 +00:00
matt
12dca1407b Condition ({ ... }) by __GNUC__. Remove redundant SPR_IBAT0U definiton. 2003-03-14 06:22:51 +00:00
matt
d7fc76efe1 Add _LOCORE protection. 2003-03-14 06:21:19 +00:00
matt
61920c743e Make ALI trap print DSISR. 2003-03-14 05:38:53 +00:00
matt
a7b613e469 Use __asm and __volatile to make lint happy. 2003-03-14 05:37:51 +00:00
matt
ce05df7bc7 Quiet lint warning. 2003-03-14 05:37:14 +00:00
matt
8ceb32c0af make LINTSTUB work with this. 2003-03-14 05:36:39 +00:00
matt
c894ddaec1 Print more useful messages on kernel ALI or PGM traps. 2003-03-14 05:32:27 +00:00
matt
0c29e154e3 Use __asm & __volatile to make lint(1) happy. 2003-03-13 17:30:38 +00:00
matt
cd26de2684 Same code exists in both halves in #ifdef/#else/#endif. move it outside. 2003-03-12 06:00:36 +00:00
hannken
44b1e07ec9 Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403".
- different set of device control registers.
  - non-standard access to the time base.
  - 16 byte cache lines.

Approved by: Eduardo Horvath <eeh@netbsd.org>
2003-03-11 10:40:15 +00:00
matt
210f48e582 Remove unneeded conditional code. 2003-03-06 07:15:46 +00:00
matt
0b8a5fd80f Adapt to powerpc/bus.h changes. 2003-03-06 00:20:39 +00:00
matt
ff2281b498 Add preliminary support Marvell (Galileo) Discovery System Controllers.
This code was contributed by Allegro Networks.
2003-03-05 22:08:18 +00:00
matt
6d251b3be3 Make AltiVec registers available via ptrace/procfs. Simplify AltiVec
processing.  Add a "common" procfs_machdep.c for PowerPC platforms.
Even though it is supposed to be port specific, most (if not all)
PowerPC ports can just use the common one.
2003-03-05 05:27:24 +00:00
matt
fb2cebb577 Pass the address of the intrframe to the ext_intr routine. 2003-03-04 08:34:12 +00:00
matt
107803a3a3 Re-arrange things in evbppc & powerpc to support OEA-based eval boards
in evbppc.  OEA-based board(s) to be added later.
2003-03-04 07:50:57 +00:00
matt
9875f9218d Add some missing volatiles. 2003-03-04 07:48:09 +00:00
tshiozak
31e2cbf0b5 add some ISO C 1995 I18N functions and types:
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
2003-03-02 22:18:11 +00:00
matt
5401f85320 Restore MQ to trapframe from mcontext since it's in both. 2003-03-02 01:07:55 +00:00
jklos
b9f3bdb8fb Added L3CR_CONFIG to the parameter list for 745x L3 cache configuration. 2003-02-26 21:14:32 +00:00
jklos
0c5117e1f9 Added configuration entries for L3CR_CONFIG for L3 caches on 745x
accelerators. Thanks to Monroe Williams.
2003-02-26 21:10:51 +00:00
jklos
7109206620 Added L3CR_CONFIG for support of 745x G4 L3 cache configuration. 2003-02-26 21:05:23 +00:00
matt
869bbf806d Add some RAS support. Don't print out a message when we encounter
trap instructions.
2003-02-25 23:32:03 +00:00