Commit Graph

7 Commits

Author SHA1 Message Date
bjh21 2c4e09f4c9 Revert last change, which shouldn't have applied to this file. 2001-03-20 00:04:28 +00:00
bjh21 23836945a3 Redefine bus_space_addr_t to be a raw address, for compatibility with arm32
podulebus drivers.
2001-03-20 00:03:10 +00:00
bjh21 3c3ed6cecd Flush out cf_unit abuses.
Also, most device functions related to IRQ handling no longer take a device
pointer.  We make so many assumptions about the machine's layout in irq.c that
this just seemed silly.
2001-01-23 23:58:31 +00:00
bjh21 f32fc0fc90 Use evcnts properly for interrupt counting.
The architecture here follows that of the vax port -- each device has its
evcnt in its softc, but defers actually incrementing it to the IRQ
dispatcher.  This way, devices can attach sub-counts (e.g. Rx and Tx counts
for Ethernet interfaces), but don't all have to have code to increment the
counters.

Drivers deliberately call evcnt_attach_dynamic() before establishing their
interrupt handler so that the establish routine can attach a parent event if
that's appropriate.  At present, it isn't.
2001-01-23 22:07:59 +00:00
bjh21 7424b1f3c1 Grotty hack to attach names to interrupts.
Should be fixed when I next overhaul this code.
2001-01-11 14:56:07 +00:00
bjh21 acb0541a4b Use symbolic names for interrupt lines. 2000-08-23 17:28:51 +00:00
bjh21 d7eebd9227 Basic driver for CHIPS 82C710 Universal Peripheral Controller and friends,
as used on later arm26 system (A5000, A4, A3010, A3020, A4000).

What we have got:
...
upc0 at iobus0 base 0x010000: config state bb 87 1c 00 00
fdc at upc0 offset 0x3f4 not configured
wdc0 at upc0 offset 0x1f0
lpt0 at upc0 offset 0x278
com0 at upc0 offset 0x3f8: ns8250 or ns16450, no fifo
...

What we haven't got:
 - FDC support (found, but not configured).
 - Clearing lpt interrupts on arm26 systems (needs help from IOEB).
 - A upc(4) manual page.
 - More than minimal testing (my A3020s don't have root devices).
 - A proper probe routine (arm26 can't use one anyway).
2000-08-16 23:56:08 +00:00