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58faa5f0ca
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1152 Commits

Author SHA1 Message Date
simonb
58faa5f0ca Clean up #ifdef checks a little. 2002-03-05 14:08:07 +00:00
simonb
6f0fb25121 Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>. 2002-03-04 02:43:22 +00:00
simonb
4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
christos
e8116a8f5b - Use DEV_ constants, instead of documenting the numbers! 
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
 2002-02-27 01:20:51 +00:00
simonb
e19a9be04b Note that "addu $x, $y, $0" is a "move" only in 32-bit mode. 
XXX: need to revisit this.
 2002-02-22 16:18:36 +00:00
simonb
2d8577fb83 Clean up some rampant code duplication wrt ieee number handling: 
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
 2002-02-19 13:08:12 +00:00
simonb
4a188395df Make the ddb_regs declaration an extern in db_machdep.h and declare it on 
db_interface.c.
 2002-02-15 07:32:34 +00:00
thorpej
90544559d3 Don't put `frompc' into a0 in the delay slot of the __mcount 
call; `jal __mcount' might be expanded by the assembler, and
thus a bogus `frompc' value could be passed.
 2002-02-05 07:12:20 +00:00
manu
97db5a818c Added errno translation for non native OSes emulation (IRIX, Linux, Ultrix) 2002-02-02 20:28:59 +00:00
uch
715eb97754 remove unused variable. 2002-01-30 16:10:08 +00:00
uch
e3ba66bfd4 move TX39 specific cache configuration code to cache.c 2002-01-30 16:09:29 +00:00
shin
69d0f55255 add VR4131 cache-op bug workaround code. 
we can't use Hit_WriteBack_Invalidate.
 2002-01-19 04:25:36 +00:00
soren
07e21646eb Options MIPS3_5200 and MIPS3_L2CACHE_PRESENT are gone. 2002-01-14 19:07:16 +00:00
enami
5c12da5b4a Define new macro to access FSR register and use it. 2002-01-12 01:40:36 +00:00
enami
16fc46b962 Access FSR register correctly in struct fpreg.r_regs[]. 
This fixes sshd (actually, libcrypto) failure with new-toolchain.
 2002-01-12 01:37:08 +00:00
thorpej
94f30b739f Add the BONITO_ICU_RETRYERR bit. 2002-01-09 02:35:29 +00:00
thorpej
4928315412 Update copyright. 2002-01-09 00:44:06 +00:00
thorpej
d25ffb2822 Add code to manipulate the BONITO I/O Buffer Cache. 2002-01-09 00:43:38 +00:00
shin
a0a83ff5d4 fix pasto. 
s/trunc_line/trunc_line16/
 2002-01-07 07:43:52 +00:00
takemura
eef721771a Modify only K0 bits and save other bits. (HPCMIPS_L1CACHE_DISABLE) 2002-01-04 09:26:39 +00:00
uch
e4130f57f1 _intr_suspend and _intr_resume declarations are moved to intr.h. 2002-01-02 12:36:20 +00:00
shin
b7e3f7d6e3 R4000/R4400 always detects virtual alias as if 
primary cache size is 32KB. Actual primary cache size
is ignored wrt VCED/VCEI.
 2001-12-28 04:06:06 +00:00
shin
f15b256063 check if curproc is invalid, and do panic. 
otherwise, we can't useful backtrace.
Ex. address error in interrupt handler.
 2001-12-28 02:13:14 +00:00
shin
ae12ee76a0 add #ifdef DEBUG around VCED_count etc. 2001-12-27 22:55:46 +00:00
shin
606f00a905 split VCED and VCEI. 2001-12-27 04:19:17 +00:00
shin
d00d2e4bcb simplify VCED processing. 
just write back and invalidate secondary cache line and fetch data again.
 2001-12-27 04:03:37 +00:00
takemura
490f777a1f Added Vr4131 support. 2001-12-23 13:10:46 +00:00
thorpej
51535d4bf5 Add support for dumping ELF-cormat core files. 2001-12-09 23:05:56 +00:00
atatat
b45c51b1fc Roll the rest of the ports over to the new MI kernel build machinery. 
Any problems reported by testers have been fixed, and massive
cross-compiling of kernels has shown that any problems that remain
with actually building kernels are not related to this.
 2001-12-09 05:00:40 +00:00
manu
342f5317b0 Added IRIX signal trampoline 2001-12-08 11:15:43 +00:00
uch
2c8098281b TX39, R5900 cache configuration. 2001-12-02 10:37:25 +00:00
manu
fd6a281221 Added twomissing SYSCALL_SHIFT for indirect syscall through SYS_syscall 2001-12-02 08:28:18 +00:00
manu
55c08f5ede Back out the copy of theses files to userland 2001-11-28 20:13:34 +00:00
manu
fa1e4588d9 We need to copy new SVR4 header files to /usr/include/sys... 2001-11-28 12:13:49 +00:00
manu
f73e64b4be Added support for COMPAT_IRIX 2001-11-28 11:54:15 +00:00
lukem
ecb81c3f6d - convert usage of "defopt" to "defflag" where the relevant option does 
not support a value (e.g., it's to be used as "options FOO" instead of
  "options FOO=xxx"). options that take a value were converted to
  defparam recently.
- minor whitespace & formatting cleanups
 2001-11-28 10:21:10 +00:00
nisimura
9f8ca586ad Fix a small typo in comment. 2001-11-28 08:49:19 +00:00
manu
12c949a188 Added COMPAT_IRIX (being developped, not functionnal at that time) 2001-11-26 21:38:41 +00:00
shin
3dfc0ff3ab fix pasteo. 2001-11-26 13:16:17 +00:00
uch
6bd02d8e33 add #ifndef _LOCORE. 2001-11-23 15:48:40 +00:00
tsutsui
d8879382cf Add 32B/l L1 D/I-cache ops for newer ARC machines. 2001-11-23 06:21:49 +00:00
simonb
944346b889 KNF, ANSIfy. 
Change print_addr() to take an db_addr_t argument instead of a long.
 2001-11-22 06:58:03 +00:00
simonb
973ad566f7 Update the CP0 register names. 
Make some tables line up nicely.
Make print_addr() static.
 2001-11-22 06:00:31 +00:00
manu
675946fd1c Fixed the Linux signal trampoline and linux_sys_sigreturn(). Linux signal 
delivery now seems fully functionnal.
 2001-11-20 21:37:50 +00:00
lukem
03aef4723c cleanup: 
options SPACE TAB
	makeoptions TAB
	psuedo-device TAB
	remove trailing whitespace
	replace multiple spaces -> tabs
	options "FOO" -> options FOO
	options "FOO=bar" -> options FOO=bar
	options "FOO=\"bar\"" -> options FOO="\"bar\""
 2001-11-20 12:56:17 +00:00
shin
07356ec733 improve r4k_sdcache_XXX_generic(). 2001-11-20 06:32:21 +00:00
thorpej
6e69c4e62c Add mips_dcache_align and mips_dcache_align_mask variables that 
contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.

Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
 2001-11-19 01:28:07 +00:00
thorpej
4609c9fbb4 r4k_sdcache_wbinv_range_index_32(): fix a typo (16 -> 32). 2001-11-18 18:48:55 +00:00
thorpej
e6cab2e799 Add 128b/l L2 cache ops. 2001-11-18 18:46:20 +00:00
simonb
0f3507ed9c White space nit. 2001-11-18 03:47:53 +00:00