Commit Graph

24 Commits

Author SHA1 Message Date
scw 00627955a1 Some minor optimisations to avoid checking {cpu,mmu}type when
the kernel was built for only one type of CPU.
2000-12-20 16:53:50 +00:00
scw 1f9f7cbe53 UPAGES -> 2 as recommended by Chuck Silvers. 2000-12-05 18:46:10 +00:00
scw b6f0a678dd Add support for the m68060-based machines: MVME-172 and MVME-177.
CPU support taken from a combination of NetBSD/amiga and NetBSD/x68k.

At this time, MVME-172 works but MVME-177 is untested. Since the '177
is otherwise identical to the MVME-167, this should *just work*.
2000-11-20 19:35:28 +00:00
scw a5a054f2c9 Nuke HP_SEG_SIZE. Use NBSEG instead (as used by m68k_trunc_seg() et al),
which takes into account the mmu type.
2000-05-27 22:37:47 +00:00
scw 9c745dbd5e Merge 'scw_mvme68k_bus_space' branch with the trunk.
These changes add support for:

	o The MI VMEbus framework on both MVME147 and MVME167.
	o Enhancements to the existing MD bus_space(9) implementation.
	o Most of the bus_dma(9) API.
2000-03-18 22:33:02 +00:00
thorpej dded044fc2 Update for the NKMEMPAGES changes. 2000-02-11 19:25:12 +00:00
ragge 0513268399 CL* discarding. 1999-12-04 21:13:19 +00:00
scw b85d5442ca Add #ifdef _KERNEL around the spln() macros. 1999-09-21 18:49:19 +00:00
thorpej eb20bbc780 Change the semantics of splsoftclock() to be like other spl*() functions,
that is priority is rasied.  Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.

This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).

XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX.  This platforms still have this bug until their
XXX spl*() functions are fixed.
1999-08-05 18:08:08 +00:00
scw 7c6d40745a Double the value for NKMEMCLUSTERS, to allow more KVA for LFS et al. 1999-05-22 16:37:03 +00:00
scw 9a7c49a33e Add splserial(). 1999-02-20 16:24:53 +00:00
scw a84a67440f vm_offset -> [vp]addr_t and vm_size_t -> [vp]size_t
While I'm here, expunge use of 'register' storage class.
1998-08-22 10:55:33 +00:00
leo ef6f3f7e25 Move the definition of MSGBUFSIZE up to the machine-arch level if
possible. Pointed out by Bernd Ernesti.
1997-09-20 12:08:24 +00:00
leo d4713d24c2 Implement the kernel part of pr-1891. This allows for a more flexible sized
msgbuf. Note that old 'dmesg' and 'syslogd' binaries will continue running,
though old 'dmesg' binaries will output a few bytes of junk at the start of
the buffer, and will miss a few bytes at the end of the buffer.
1997-09-19 13:52:37 +00:00
veego 1450ec3f1b Restore the define of NPTEPG. 1997-07-10 08:23:03 +00:00
veego 6304388ee4 The 'Mach derived conversion macros' are now in <m68k/param.h> 1997-06-10 18:47:21 +00:00
veego 931d90fcee Use the MI <m68k/param.h> include. 1997-06-10 07:54:35 +00:00
fvdl 115b6d92fa Define ALIGNED_POINTER 1997-02-24 23:16:53 +00:00
chuck 81fc59565a cpu.h: add prototypes (from jason)
disklabel.h: new disklabel format (from Dale Rahn)
param.h: new delay stuff (from sun3 port)
vmparam.h: nuke eiomap for new autoconfig (from jason)
z8530var.h: for MI driver (from jason)
1996-04-26 19:40:53 +00:00
cgd 18ec26aa21 add _MACHINE and _MACHINE_ARCH, which are like MACHINE and MACHINE_ARCH,
execpt without quotes.  meant to be __CONCAT()ted for easy #includes
of machine-dependent headers for MI code (e.g. for the MI ISA/EISA/PCI/TC
bus code).
1996-03-04 05:04:10 +00:00
cgd 1c5d7babe5 Clean up tabbing/spacing in defns of MACHINE, MACHINE_ARCH, and MID_MACHINE. 1996-03-01 23:30:08 +00:00
mycroft 88e512b693 LOCORE -> _LOCORE 1996-02-01 22:28:24 +00:00
mycroft 6cc376290b Replace splnet() with splsoftnet(). Add splnet(). 1995-08-13 00:27:11 +00:00
chuck 0b036e11bf mvme68k port -- for the motorola vme147 m68030 card 1995-07-25 23:11:53 +00:00