10 Commits

Author	SHA1	Message	Date
thorpej	49784e4bd0	Merge the nathanw_sa branch.	2003-01-18 06:33:41 +00:00
thorpej	508e2dcf41	When delivering a signal, don't push the signum, code, and context pointer, ... or handler onto the stack. Instead, just stuff them into the correct argument registers (handler is a "4th arg").	2002-06-23 18:35:05 +00:00
uch	944192661c	s/trapno/expevt/ for clarity.	2002-05-09 12:25:41 +00:00
uch	6d338ff407	Use "#define<tab>", white space nits.	2002-04-28 17:10:32 +00:00
uch	24ec477a45	Rework interrupt code. ... + Fully utilize SH SR.I[0:3] interrupt level. + software interrupt is emulated by TMU1, 2 one shot interrupt. + implement generic soft interrupts. + implement clockframe correctly.	2002-03-24 18:04:39 +00:00
uch	93da9db963	cosmetic changes, fix comments.	2002-03-17 17:55:22 +00:00
uch	4c6260b9de	kernel stack fix. old code simply P3 address converted to P1, it ... caused memory destruction when kernel stack grow over 1 page. new code use P3 address for kernel stack. but for the sake of debug, P1 kernel stack mode remain.	2002-03-17 14:02:03 +00:00
uch	693be1956c	Move common exception vector and scheduler code to ... sh3/sh3/exception_vector.S and sh3/sh3/locore_subr.S. exception vectors are installed by sh_cpu_init(). machine/locore.S contains kernel entry, interrupt handler, and some MD code.	2002-02-24 18:19:40 +00:00
tsubai	9fdd44d404	DDB single step and stack trace support.	2000-09-08 10:15:23 +00:00
itojun	65363da25e	Merge in NetBSD/sh3 from cvs.kame.net repository. ... Tree structure: - sys/arch/sh3: sh3 generic code As commented, in-chip device drivers are put into sys/arch/sh3/dev. - sys/arch/evbsh3: sh3 evaluation boards (pure sh3 CPU, no fancy external HW) - sys/arch/mmeye: Brains mmEye, www.brains.co.jp MI source code includes couple of #ifdef for sh3-coff support. (sh3 uses coff or elf) Needs some more improvements, especialy in sys/arch/sh3/conf/files.sh3, to compile the tree (due to last minute tree structure change).	1999-09-13 10:30:21 +00:00