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1524 Commits

Author SHA1 Message Date
ad 8d37a29277 Regen. 2000-08-04 14:32:05 +00:00
ad fc2908cf8a Vortex Computer Systems changes, from OpenBSD: 
- Add product ID for GDT6518RS.
- Fix bogus product IDs.
 2000-08-04 14:31:40 +00:00
tsutsui ef86d29308 Add one more delay() to sip_read_eeprom(). 2000-08-04 09:30:56 +00:00
nathanw fb20241fda When performing pci_config_dump: 
- Display the full value of 64-bit BARs.
 - Avoid displaying the upper 32 bits of 64-bit BARs as a separate 32-bit BAR.
 2000-08-03 19:58:55 +00:00
castor b6dd28b4ce Support some differences in the Macronix 98715AEC-C and E chips from the other 
98715* series.

The MX98715AEC-[C,E] use a different location in the serial eerom for
LED control, and programming it with the original location's values
caused unpredictable behavior.

Also, start integrating fixes where media changes on an adapter
under load may fail.  There's more work to be done here, but I need
to sort out our internal changes a little more carefully.
 2000-08-03 03:07:30 +00:00
mjacob cb4d63d57c More compilation breakage in the non-DEBUG case 
(from Castor Fu <castor@geocast.com>)
 2000-08-03 03:00:04 +00:00
bouyer 46c3f0204d PCIIDE_CMD0646U_UDMA->PCIIDE_CMD0646U_ENABLEUDMA for consistency with 
PCIIDE_AMD756_ENABLEDMA
defopt PCIIDE_CMD0646U_ENABLEUDMA, PCIIDE_AMD756_ENABLEDMA,
    PCIIDE_CMD064x_DISABLE
Fix a typo pointed out by John Hawkinson
 2000-08-02 21:49:09 +00:00
bouyer bd0766459c Add support for the CMD PCI646U. Linux claims that this driver is brocken 
with UDMA, so enable Ultra-DMA only if "options PCIIDE_CMD0646U_UDMA" is set.
 2000-08-02 20:23:45 +00:00
mjacob 1ae072f471 Fix bonehead bug for compiles w/o DEBUG set 
(thanks to KANETA Shin'ichi <kaneta@cr.chiba-u.ac.jp>)
 2000-08-02 17:39:50 +00:00
mjacob 068c76fc80 Core version 2.0 (platform version 1.0) rewrite of ISP driver. Some 
interace cleanups, some new common functions. The major impact that
will be noticeable right away is that if you boot with not Fibre connected
to the FC cards, you no longer hang indefinitely.
 2000-08-01 23:55:09 +00:00
bouyer 76c77aca38 Add support for the CMD PCI0646U2, an Ultra/33 version of the 0646. 
Note: there's also a PCI0646U, for which I don't have docs for now.
 2000-08-01 21:02:55 +00:00
jhawk d569dc2fb5 Whitespace fix (space rather than tab after #ifdef) 2000-07-29 17:49:08 +00:00
jlam cbd3022e31 Make this compile without PUCCN defined. 2000-07-29 17:43:38 +00:00
castor b2bf026f39 Guard the console code in puc.c with the defopt PUCCN so we can 
use the puc driver without having the com drivers.
 2000-07-28 20:43:45 +00:00
thorpej 081f57c846 Handle booting without a serial expander box connected. 2000-07-28 06:10:54 +00:00
bouyer 0154cbce36 Ops, forgot this one: Add interrupt disable bit #define for HPT370 2000-07-27 15:26:16 +00:00
bouyer aa0d4a41d5 HPT370: clear disable interrupt bit; make it works in Ultra/66 mode. 2000-07-27 14:28:45 +00:00
jeffs fa8ff381d8 Add code to allow the PCI com serial ports to be used as the system 
console.  This is not enabled by default, and is turned on with
options PUCCN.  Done by castor@netbsd.org.
 2000-07-25 23:18:42 +00:00
jonathan 5f7778cd1e * Add entries for older Yamaha YMF chips (724, 740) plus the 
newer steppings (740C, 724F) which use the same microcode as the
  DS-1S/DS-1E.
Regen.
 2000-07-23 00:18:24 +00:00
jonathan 2169753fc5 * Add entries for older Yamaha YMF chips (724, 740) plus the 
newer steppings (740C, 724F) which use the same microcode as the
  DS-1S/DS-1E
 2000-07-23 00:14:15 +00:00
ad b60bcd873d Regen. 2000-07-20 14:47:35 +00:00
ad d3b42c18e4 Add what is apparently ESS's old vendor ID and corresponding product ID for 
the Maestro 1.
 2000-07-20 14:46:51 +00:00
bouyer 6e88d58524 Make it compile when PCIIDE_AMD756_ENABLEDMA is defined. From kern/10555 
by MURATA Shuuichirou.
 2000-07-20 12:19:41 +00:00
augustss 00cafd0569 Add MIDI support. From Tatoku Ogaito. 2000-07-19 09:58:45 +00:00
soda c41ca10d33 add "#define PCI_INTERRUPT_PIN_MAX 0x04" 2000-07-18 10:59:04 +00:00
tron 5446d3c92e Don't make assumptions of the actual value of PCI_PMCSR_STATE_D0. 
Problem noted by John Hawkinson.
 2000-07-17 18:12:00 +00:00
tron cfae3184d8 Don't clobber bits from 2 to 31 when trying to change the power state. 
Problem noted by John Hawkinson.
 2000-07-17 17:53:44 +00:00
tron 114bb7f9d9 If card is in power state D3 put it into power state D0 so that it will 
at least work after the next reboot.
 2000-07-16 20:18:48 +00:00
jhawk 859057e6b3 Fix uninitialized variable (reg) in fxp_pci_confreg_restore(); 
this could result in garbage being written to the PCI status register,
which is unlikely to have had a serious effect. This was with us from
an #if 0 added in rev 1.6.
 2000-07-15 21:36:19 +00:00
tron 9feae259a4 Avoid printing duplicate colon when card is waked up. 2000-07-15 20:57:24 +00:00
tron cfe61a3025 Un-__P'ify kernel prototypes. 2000-07-15 19:59:27 +00:00
tron 61c607b9fe Improve kernel message when card is in power state D3. Instead of... 
epic0 at pci0 dev 11 function 0 epic0: unable to wake up from ...

... print this:

epic0 at pci0 dev 11 function 0: unable to wake up from power state D3
 2000-07-15 10:32:36 +00:00
tron 498310f5be Check if card was put into sleep mode using PCI/ACPI power management 
and try to restart it. This patch based on hints by Jason Thorpe.
 2000-07-14 22:00:32 +00:00
ad b71bddab49 Regen. 2000-07-10 16:32:07 +00:00
ad 5a5452c95d Add ICP Vortex RAID controllers. 2000-07-10 16:14:02 +00:00
jhawk 469c88cc11 Clarify that the RX5C47X requires writes to the PCI_LEGACY to 
disable and not PCI_BCR_INTR; this is what rev 1.9 did under
the label of "Maintenance."
 2000-07-09 22:06:02 +00:00
jhawk e6e9cc5c41 Move legacy pcic-mode disabling code from pccbb_chipinit() to 
pccbbattach(). This is necessary as pccbb_chipinit() is deferred, and
may not run until after the pcic is already attached.

Now pcics are properly disabled on Sony VAIO, f'rinstance.
 2000-07-09 21:58:30 +00:00
mycroft bd8f07c394 Recognize the i82559ER. 2000-07-09 00:46:26 +00:00
mycroft 5cdb782283 Regen. 2000-07-09 00:45:56 +00:00
mycroft 9d0e35cc63 Add ID for i82559ER. 2000-07-09 00:45:14 +00:00
mrg 6421cc8af8 regen 2000-07-08 04:39:50 +00:00
mrg d74c0a2e3e add microSPARC IIep PCI controller 2000-07-08 04:38:55 +00:00
bouyer 2646cf1612 Use the CMD PCI0648/9 IRQ ACK code for the 0646 too, makes the 0646 works 
in native mode.
 2000-07-07 13:54:25 +00:00
bouyer e2aaf9ef7f Work around a bug in AMD756 rev D2, from patches provided by David Sainty: 
disable multiword DMA for these chips. multiword DMA can be forced with
options PCIIDE_AMD756_ENABLEDMA on rev D2 chips, but use at your own risk !
While I'm there remove a duplicate allocation of sc_wdcdev.nchannels in HPT
code.
 2000-07-06 15:08:11 +00:00
mjacob c466b99a9a Use new isp_handle_index function. Redo how firmware is checked for 
and loaded. Remember to enable interrupts after isp_reset but before
isp_attach. Return CMD_EAGAIN on request queue overflow so we can retry
the command when there's more queue space.
 2000-07-05 22:12:23 +00:00
bouyer 3c5afc2677 Back out previous, it has to be done in a different way. 2000-07-05 19:05:31 +00:00
bouyer 838676ce64 Apply patch from David Sainty <David.Sainty@optimation.co.nz>: 
Some AMD controllers have a bug which can look up the machine when using DMA, so
disable DMA for some revisions (info provided by AMD).
"options PCIIDE_AMD756_ENABLEDMA" can be used to force DMA on these chips.
 2000-07-05 18:58:41 +00:00
bouyer fa436f165c HPT: use pciide_channels[i] not pciide_channels[0]. My HPT370 now probes 
both channels (but still doesn't work properly; I suspect I got a broken one).
 2000-07-05 16:11:35 +00:00
enami 88a0f6ee93 Match with promise ultra100/ata contoller. I haven't actually test this 
contoller with ultra100 drive, but it works at least with ultra66 or more
older drive
 2000-07-04 16:34:33 +00:00
enami fa92d1c635 Regen. 2000-07-04 16:30:42 +00:00