Commit Graph

422 Commits

Author SHA1 Message Date
nathanw
4d59420344 Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.
2003-09-26 22:45:41 +00:00
matt
6986092cfe Add a machine-dependent SIGTRAMP_VALID macro which is used to test whether
a trampoline version is valid or not.
2003-09-26 22:14:19 +00:00
matt
2deb8b2e7b Deal with the constification of ksiginfo_t and sigset_t in signalling. 2003-09-25 22:22:36 +00:00
matt
85a5f3065d Add siginfo support for PowerPC. 2003-09-25 18:42:18 +00:00
matt
9c8a5009b3 Define va_list as __builtin_va_list for GCC 3.x. Change stdarg macros
appropriately.  (this is committed from a system run a kernel and userland
built with these changes).
2003-09-24 02:39:56 +00:00
shige
fc29eb23bf Add some PCI definitions listed in evbppc/include/walnut.h. 2003-09-23 15:19:05 +00:00
shige
2977d5a89a Add IBM40x specific machdep functions. 2003-09-23 15:14:02 +00:00
shige
87f629a7b8 Add IBM405GPr PVR. 2003-09-23 15:10:05 +00:00
manu
d13828a7dd forgotten commit for KERN_PROCARGS sysctl in COMPAT_DARWIN 2003-09-07 07:50:31 +00:00
matt
cec9cb32df Move CLKF_BASEPRI to machine specific <intr.h> file since it depends on
the encoding of the spl for the port.
2003-09-03 21:33:31 +00:00
simonb
05c33c1c05 Need to set BUS_DMA_COHERENT to BUS_DMA_NOCACHE on IBM ppc4xx CPUs.
The "emac" interface now works properly again on my Walnut.  Much
thanks to Steve Woodford for tracking this down.
2003-09-03 13:30:05 +00:00
matt
31cc6ab700 Move SFRAMELEN to frame.h and use it in vm_machdep.c. In setfunc, setup
callframe linkages correctly.  Restore use of ldptr to locore_subr.S
[pthreads and gdb no longer crash/hang the system]
2003-08-27 20:20:07 +00:00
chs
939df36e55 add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default.  the changes
fall into two basic catagories:

 - pmap and trap-handler changes.  these are all MD:
   = alpha: we already track per-page execute permission with the (software)
	PG_EXEC bit, so just have the trap handler pay attention to it.
   = i386: use a new GDT segment for %cs for processes that have no
	executable mappings above a certain threshold (currently the
	bottom of the stack).  track per-page execute permission with
	the last unused PTE bit.
   = powerpc/ibm4xx: just use the hardware exec bit.
   = powerpc/oea: we already track per-page exec bits, but the hardware only
	implements non-exec mappings at the segment level.  so track the
	number of executable mappings in each segment and turn on the no-exec
	segment bit iff the count is 0.  adjust the trap handler to deal.
   = sparc (sun4m): fix our use of the hardware protection bits.
	fix the trap handler to recognize text faults.
   = sparc64: split the existing unified TSB into data and instruction TSBs,
	and only load TTEs into the appropriate TSB(s) for the permissions.
	fix the trap handler to check for execute permission.
   = not yet implemented: amd64, hppa, sh5

 - changes in all the emulations that put a signal trampoline on the stack.
   instead, we now put the trampoline into a uvm_aobj and map that into
   the process separately.

originally from openbsd, adapted for netbsd by me.
2003-08-24 17:52:28 +00:00
matt
121c8942a6 Not all PPC ports (e.g. macppc) equate IPL_NONE with 0. 2003-08-18 22:10:33 +00:00
chs
4ba6255f14 add some 745x-specific MSSCR0 bits. 2003-08-17 18:08:17 +00:00
chs
f19809f0fa remove an unused proto. 2003-08-17 18:07:11 +00:00
matt
47483092bd Cleanup/rework cpu_switch*, switch_exit, Idle routine. Remove pcb_psl
since it was write-only.  When setting up a process, make sure the fake
callframes are properly linked together.

Only lower SPL when in Idle loop.  Raise spl to previous level (which would
be IPL_SCHED) when exiting Idle loop.  Never lower SPL anyplace else.
2003-08-12 18:34:47 +00:00
matt
c0d6cb285d Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks
and those no longer exist.  for few uses that need CURPM, use CURPCB/PCB_PM
2003-08-12 05:06:53 +00:00
matt
3d5b7190ad Nuke ci_spillstk/CI_SPILLSTK. No longer needed. 2003-08-08 07:14:26 +00:00
agc
aad01611e7 Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
simonb
20a37f9627 Note that the used interrupt bits are 405GP specific.
Fix a tyop.
2003-08-05 02:10:31 +00:00
matt
0e50e47bb9 Make that OEA based kernels can properly deal with kernel ISI faults. Now
that LKMs are supported, it is possible for a LKM page to be "outspilled"
resulting in a possible ISI fault.  Try to spill the page back in.
2003-08-04 22:26:59 +00:00
matt
dd1c661661 Nuke stmreg/ldmreg. PPC64 doesn't have a lmd/stmd so make sure lmw/stmw
don't invoke valid instructions on PPC64.
2003-08-02 19:40:39 +00:00
matt
c9d56ac39d Add symbolic offsets for what's in cpu save locations.
Add a PPC64 variant of mftb
2003-08-02 19:35:26 +00:00
matt
f9c46681fd Change switchframe to use register_t (anything that uses stmX/lmX needs
to be defined as register_t).
2003-07-31 15:29:29 +00:00
matt
f5444cea2f Define SZREG {4,8} appropriately. Add pseudo-instructions (via #define)
to load/store int, long, pointer, register, multiple registers.  This is so
assembly files can be support IPL32 and LP64 PowerPC implementations.
2003-07-31 06:23:55 +00:00
matt
18eb53cd22 add PSL_TGPR (for MPC603) 2003-07-31 01:25:38 +00:00
simonb
14fc7f3334 Whitespace alignment nits. 2003-07-27 23:45:44 +00:00
scw
728102e66c Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code. 2003-07-25 10:12:42 +00:00
hannken
879ba21504 Typo: __HAVE_BITENDIAN_BITOPS -> __HAVE_BIGENDIAN_BITOPS 2003-07-21 16:10:50 +00:00
matt
5819fb160d Elimindate MD setrunqueue/remrunqueue (which were out-of-date compared to
the canonical versions in kern_synch.c).  Define __HAVE_BIGENDIAN_BITOPS
so the canonical versions will be used but will store priorities in the
desired (MSB) order for PowerPC (which allows the use of the cntlzw (count
leading zeroes, word) instruction in locore_subr.S to find the proper
priority).
2003-07-18 01:08:10 +00:00
fvdl
d5aece61d6 Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.
2003-06-29 22:28:00 +00:00
darrenr
257443876f 'struct proc *' -> 'struct lwp *' as required to get GENERIC for macppc built 2003-06-29 11:02:21 +00:00
martin
d505b18964 Make sure to include opt_foo.h if a defflag option FOO is used. 2003-06-23 11:00:59 +00:00
thorpej
452a8fdae2 Rename IPL_IMP -> IPL_VM. 2003-06-16 20:00:56 +00:00
fvdl
7dd7f8baa2 Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
2003-06-15 23:08:53 +00:00
msaitoh
6f197c635e Add support IBM 405GPr 2003-06-13 04:05:26 +00:00
scw
e05ce46e3e Oops, delete an accidentally committed local change. 2003-06-12 08:47:21 +00:00
scw
0328210bcc Allow <machine/bus.h> to override the definition of BUS_DMA_COHERENT.
For example, machine-dependent code can make it equivalent to
BUS_DMA_NOCACHE if the hardware cannot reliably snoop the bus.
2003-06-12 08:43:07 +00:00
kleink
776138ea69 Rename <sys/float_ieee.h> to <sys/float_ieee754.h>, following libc's
convention for these.
2003-05-12 15:22:53 +00:00
scw
8c5c893bf7 Add a BKPT_ADDR() macro which gives MD code a chance to munge a
breakpoint address before it's used. Currently a no-op on all but sh5.

This is useful on sh5, for example, to mask off the instruction
type encoding in the bottom two address bits, and makes it possible
to do "db> break $rXX" instead of manually munging the address.
2003-04-29 17:06:03 +00:00
bjh21
4be7a2dcf3 Add a new feature-test macro, _NETBSD_SOURCE. If this is defined
by the application, all NetBSD interfaces are made visible, even
if some other feature-test macro (like _POSIX_C_SOURCE) is defined.
<sys/featuretest.h> defined _NETBSD_SOURCE if none of _ANSI_SOURCE,
_POSIX_C_SOURCE and _XOPEN_SOURCE is defined, so as to preserve
existing behaviour.

This has two major advantages:
+ Programs that require non-POSIX facilities but define _POSIX_C_SOURCE
  can trivially be overruled by putting -D_NETBSD_SOURCE in their CFLAGS.
+ It makes most of the #ifs simpler, in that they're all now ORs of the
  various macros, rather than having checks for (!defined(_ANSI_SOURCE) ||
  !defined(_POSIX_C_SOURCE) || !defined(_XOPEN_SOURCE)) all over the place.

I've tried not to change the semantics of the headers in any case where
_NETBSD_SOURCE wasn't defined, but there were some places where the
current semantics were clearly mad, and retaining them was harder than
correcting them.  In particular, I've mostly normalised things so that
_ANSI_SOURCE gets you the smallest set of stuff, then _POSIX_C_SOURCE,
_XOPEN_SOURCE and _NETBSD_SOURCE in that order.

Tested by building for vax, encouraged by thorpej, and uncontested in
tech-userlevel for a week.
2003-04-28 23:16:11 +00:00
wiz
c42e1fac66 Management, not managment. Mostly from jmc@openbsd. 2003-04-26 22:07:12 +00:00
christos
a2dfb1b570 PR/3012: Greg A. Woods: Write all float.h files [except the vax of course]
in terms of float_ieee.h
2003-04-19 23:05:28 +00:00
dsl
b1986a13d0 change 'data' arg of fp_ioctl to 'void *' to match file.h 2003-04-16 08:58:18 +00:00
matt
dd1424e7ac Add POOL_VTOPHYS. Change vtophys to return -1 if pmap_extract fails.
(callers of vtophys should always supply a valid VA so that
pmap_extract should never fail).
2003-04-09 22:37:32 +00:00
matt
ea6acde206 MMCRx register definitions should not be prefixed by SPR_ 2003-04-04 04:03:18 +00:00
matt
5bf8112ed1 Add two missing L2CLK speeds. 2003-04-04 04:00:16 +00:00
thorpej
cc2c493bc4 Use PAGE_SIZE rather than NBPG. 2003-04-02 07:35:54 +00:00
thorpej
7c0edb9d0e Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for
PowerPC processors.
2003-04-01 23:52:35 +00:00