- Overhaul the TLB management code such that we now keep track of
the exact TLB slot at which a mapping was inserted, both for user-
space and kernel mappings. This addresses #2 on the TODO list.
original system call number, which can be negative for a Mach trap.
We cannot just replace code by realcode, because ktrsyscall uses it as
an index in the system call table, thus crashing the kernel when the
value is negative.
unmanaged mappings) so we can deal with cache aliases, make sure to
skip unmanaged/wired mappings (added via pmap_kenter_pa()) when doing
things like pmap_page_protect().
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
- Shift a leading misaligned quad to compensate for the implicit shift
in the "ldlo.q" instruction. (And remove the "XXX:" comment which correctly
hinted that this might be necessary).
- Clean up some comments.
alignment code. (There was nothing wrong with the original code path
other than it was slightly slower if the buffer was already aligned).
Also, catch another corner case related to alignment/length of the
last 1-7 bytes.
using a "movi imm, Rn / sub R15, RN, R15" pair. This is how the compiler
creates frames which are too big to fit in the immediate field of "addi";
something which happens a lot with -O0 ...
While I'm here, add a simple heuristic to detect infinite loops caused by
tracing back through some non-leaf asm routines which don't set up frames.
- Allocate interrupt handles dynamically from a pool(9) to reduce the
number of TLB misses during interrupt dispatch.
- Fully support evcnt(9) in all interrupt dispatchers.
- Use the PVO_CACHEABLE flag in the pvo as the One True Indicator of
the cacheable status of a mapping instead of peeking at the PTEH.
- Don't inline some of the larger routines, in an effort to appease
the somewhat buggy compiler.
- Fix some comments.
- Fix some casts.
- Add a bunch more debugging instrumentation.
- Move usr, sr, pc, and the branch-target registers to the top of
the listing so that it is no longer necessary to scroll through
64 integer registers to see them.
lukem