- don't erase FPSR exception bits _after_ doing most of the operations in
fpu_implode(), erase them before doing arith and store operations. This fixes
losing the DZ bit.
- create FPSR_OVFL and FPSR_UNFL bits in fpu_implode(). This showed up when
the first error was fixed.
XXX some more work needs to be done. E.g., creating OPERR together with
OVFL looks bogus, but I'm too tired know to re-check docs; and at least we
pass our own regression tests know.
<kenn@remus.rutgers.edu>. This emulator does not yet emulate
the following functions:
FSINH, FETOXM1, FTANH, FATAN, FASIN, FATANH, FSIN, FTAN,
FETOX, FTWOTOX, FTENTOX, FCOSH, FACOS, FCOS, FSINCOS
It is sufficient, however, to allow programs like df, w, and newfs,
to run to completion with correct results.
Portions of this code were based on the sparc fpe and on initial
work by gwr.
is