- remove "need-flag" for mac68k esp driver, as it is not used in anywhere
and conflicts with IPsec ESP header.
This should be the only MD change in IPv6 support, except kernel config file.
Very sorry if you have any compilation problem with it (I believe it is okay).
If your favorite arch is not included in here, please add a
call to ip6intr() from softintr handle.
- Add initial IOP support. ADB doesn't work yet for me, but it's here so
that others will be encouraged to work on it. ADB_HW_IOP basically
is configured as a NOP so that serial consoles will continue to work.
- Roll via1_intr and via2_intr into the intr.c scheme--this also required
changing rtclock_intr to grovel the stack differently so that hardclock
gets the right arguments and softclock() doesn't get all reentrant.
- Make via1 interrupts parallel to via2 interrupts--handlers get a pass-
through pointer and we can register handlers. Register via1 interrupt
with intr_establish()--normally level 1, level 6 for A/UX scheme.
- Use intr_establish() to set real via2 interrupt handler instead of the
hacked function pointer.
- Reorganize adb-direct interrupts so that a function call is removed.
- Implement A/UX interrupts for all Quadras right now. We may need to
special case some Quadras, but Linux folks are reporting success on
several models.
- Fix intrnames to be accurate for the normal, PSC, and A/UX interrupt
configurations.
some internal reference counting on PT pages. We still allocate them
with the page fault routine (a wire-fault, now), but no longer free
PT pages from pmap_pageable().
thing in both the calibrator function and the actual delay function. At
this point, _delay() does all of the work, so we can garbage collect
dummy_delay() and make _delay() an alternate entry point for delay().
This results in a small (but measurable) improvement on the IIci.
at levels 5 (sound) and 6 (via1) on the Q700.
Raise splhigh when reading and writing registers. It's ugly, but it's
possible that we could get an interrupt from a higher-level source,
causing a re-read of a memory location.
This is not good when, e.g., we are reading the interrupt register.
Ideally, we would just raise splhigh() in ncr53c9x_readregs(), but
that's m.i. code, and it may be expensive on other architectures.
has PAGEABLE and INTRSAFE flags. PAGEABLE now really means "pageable",
not "allocate vm_map_entry's from non-static pool", so update all map
creations to reflect that. INTRSAFE maps are maps that are used in
interrupt context (e.g. kmem_map, mb_map), and thus use the static
map entry pool (XXX as does kernel_map, for now). This will eventually
change now these maps are locked, as well.
- Make it compile again, with BPF.
- Don't subtract the Ethernet header length from the total packet length.
- Copy the alignment fix from sys/dev/ic/i82586.c (though the m68k shouldn't
really be affected).
directly, call the function pointer (*if_input)(ifp, m). The input routine
expects the packet header to be at the head of the packet, and will adjust
as necessary. Privatize the layer 2 input and output routines, allowing
*_ifattach() to set them up as appropriate.
the child inherits the stack pointer from the parent (traditional
behavior). Like the signal stack, the stack area is secified as
a low address and a size; machine-dependent code accounts for stack
direction.
This is required for clone(2).
of the buffer you're copying from as the loop interator, not the length
of the buffer you're copying to. Also, rewrite print_single() with
pointer instead of array operators. Appears to correct some ADB-related
`hangs' during autoconfig.
to mac68k_init(), so that we're through frobbing the MMU in special ways
by the time we get there. While it doesn't actually cause a problem with
the current structure of our initialization code, it probably would have
in the future.
had been returning (-1) as an error instead of 0. This is the result of
not keeping up with its i386 ancestor, which it was originally derived
from back in 1993. Re-sync.
