for the ELCR register; need a new header file).
- In jensenio_specific_eoi(), actually issue a specific EOI (the code
was erroneously issuing a non-specific EOI).
- In jensenio_pic_init(), ensure all IRQs are initialized to EDGE trigger.
structures:
- alpha_shared_intr_alloc() no longer takes a "string length" argument,
and just uses kmem_asprintf() to create an "irq %u" string by default.
This is suitable for nearly every caller.
- Add a alpha_shared_intr_set_string() that allows callers to override
the default IRQ description string.
- Related: make alpha_shared_intr_string() return a const char *, since
no callers should need to modify the string directly now.
- Re-factor PCI shared interrupt structure allocation / initialization
into a new alpha_pci_intr_alloc(), which is suitable for nearly every
Alpha PCI platform. Callers are expected to first have initialized
the interrupt hardware to the quiescent state.
Adjust various call sites of above functions to account for changes,
even if they are not able to use the newly re-factored code.
- Protect all of the system interrupt linkage with the cpu_lock mutex.
- Re-order some of the stores to the SCB vector table to make it safe
in the face of lockless interrupt dispatch.
- Add a framework for routing interrupts to specific CPUs. Interrupts
are still funneled only to the primary CPU, but that will change for
some systems soon. Ensure that interrupt handler lists are manipulated
only on the CPUs that handle that specific interrupt source. This required
a re-factor of the alpha_shared_intr_*() family of functions.
- Enable __HAVE_INTR_CONTROL, although interrupt redistribution is still
a no-op.
- Reduce code duplication in the Jenson direct-SCB interrupt handlers.
- Remove the ipl argument to scb_set() and the associated array of
"mpsafe" booleans initialized based on the ipl. It was bogus
anyway; all IPL_{BIO,NET,TTY}, etc. values are aliases of IPL_VM,
and for all practical purposes, there is really only one device
interrrupt level on Alpha anyway. Intead, we now treat all dispatches
from the SCB vector table as MP-safe, and it is now the handler for
that vector who is responsible for acquiring the KERNEL_LOCK if needed.
- Update the direct interrupt vector handlers in jensenio and TURBOchannel
to acquire the KERNEL_LOCK.
- Introduce a new ALPHA_INTR_MPSAFE flag, and add a flags argument to
alpha_shared_intr_establish(). When it is set, indicate that the
handler is MP-safe. Update alpha_shared_intr_dispatch() to pay
attention and acquire the KERNEL_LOCK (or not) as indicated.
- Re-factor all of the PCI interrupt handling, providing "generic PCI"
"PCI interrupts through ISA IRQs" implementations to significantly
reduce code duplication. Supplement the PCI chipset tag with more
info to facilitate this, and make the PCI interrupt-related routines
take a pci_chipset_tag_t argument rather than a void * argument.
- Because PCI interrupts on KN8AE are dispatched directly from the
SCB, provide a wrapper for non-MPSAFE interrupt handlers that
acquires the KERNEL_LOCK.
- Change the pci_intr_handle_t type to be a struct rather than an
integer type in order to catch any direct use of it as a value.
Add a set of functions to interact with pci_intr_handle_t, including
setting interrupt flags.
- Implement pci_intr_setattr() so that the PCI_INTR_MPSAFE attribute
can be set on a pci_intr_handle_t.
- While I'm here, make all of the MI PCI back-end operations call
through real functions rather than hopping directly through function
pointers in the chipset tag.
This change looks a lot bigger than it really is because of the re-factor
in the plethora of model-specific PCI interrupt back-ends. The KN8AE,
KN300, and T2/T3/T4 (Sable) are largely un-changed.
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector. This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).
We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.
thorpej