Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
92,108 Commits 606 Branches 0 Tags 3.1 GiB
Commit Graph

8 Commits

Author SHA1 Message Date
thorpej 2bc996b0bc New interrupt framework for NetBSD/evbarm, and accompanying new 
interrupt code for the IQ80310 board support package.

XXX The Integrator board support package still uses the old-style
arm32 interrupt code, so some compatibility hacks have been added
for it.  When the Integrator uses new-style interrupts, those hacks
can go away.
 2002-01-30 03:59:39 +00:00
thorpej e594c94727 Some prototype cleanup. 2002-01-20 03:41:47 +00:00
thorpej 216b9b2ea6 - Don't enable FIQs; nothing uses them (yet). 
- Steer i80200 PMU and BCU interrupts to IRQ# (for lack of a better
  place, at the moment).
- Disable all interrupts other than external-IRQ# in the i80200 ICU;
  we don't deal with any of the others, yet.
 2001-12-01 06:15:36 +00:00
thorpej 969599022a Use <arm/cpufunc.h>, not <machine/cpufunc.h>. 2001-11-23 19:36:48 +00:00
thorpej 9cc2517cfe When we read the interrupt status bits, mask it with the shadow copy 
of the "currently enabled interrupts" -- the CPLD appears to light
up the status bit even if it doesn't cause the CPU IRQ line to be
asserted.
 2001-11-07 02:56:18 +00:00
thorpej 0ea59754f1 We were already cheating w/ CPLD register access, so cheat all the 
way and use pointer derefs rather than bus_space to access them.
 2001-11-07 02:24:18 +00:00
thorpej 4a2c5fd66d * Pass the IRQ number to stray_irqhandler() and display it in 
the panic message.
* Mask off undefined bits from the XINT3 and XINT0 registers in the CPLD.
 2001-11-07 02:06:37 +00:00
thorpej acf9a688a0 Rework and fleshing out of Intel IQ80310 XScale eval board support. 
More work to do -- this is a snapshot of work-in-progress.
 2001-11-07 00:33:22 +00:00