Commit Graph

10 Commits

Author SHA1 Message Date
thorpej 2bc996b0bc New interrupt framework for NetBSD/evbarm, and accompanying new
interrupt code for the IQ80310 board support package.

XXX The Integrator board support package still uses the old-style
arm32 interrupt code, so some compatibility hacks have been added
for it.  When the Integrator uses new-style interrupts, those hacks
can go away.
2002-01-30 03:59:39 +00:00
thorpej 1e0e569ced Remove the "fiqhandler" definitions. 2002-01-13 19:20:06 +00:00
thorpej e41179bfd0 Need <arm/cpufunc.h> for cache-related variables. 2001-11-30 19:43:20 +00:00
thorpej c5ecb8d8c5 Use the new arm_dcache_align variable to set the PCI device BHLC
register.
2001-11-29 02:26:50 +00:00
thorpej 636e9cd08b Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register.  This should be the
size of the largest D-cache line on a system.
2001-11-28 23:48:34 +00:00
thorpej 8cd82ab7b7 Move interrupt-related stuff out of the generic 32-bit ARM genassym.cf
and into platform-specific genassym.cf files.
2001-11-27 00:15:58 +00:00
thorpej 969599022a Use <arm/cpufunc.h>, not <machine/cpufunc.h>. 2001-11-23 19:36:48 +00:00
thorpej b1ec255377 Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.
2001-11-09 19:29:12 +00:00
rearnsha 05885de5fc Garbage collect some early debug hacks that should not have been
committed in the first place and prevent linking.
2001-10-29 14:23:35 +00:00
rearnsha 00a19aff1d Support for the Integrator/AP core-logic FPGA. 2001-10-27 16:19:08 +00:00