Commit Graph

1976 Commits

Author SHA1 Message Date
christos
0bf5ff6ade make this compile with DIAGNOSTIC again. 1998-10-01 21:26:55 +00:00
thorpej
c5b8d42e66 Need 14 longs for jmp_buf now (sigcontext has 128-bit signal mask at the
end).
1998-10-01 03:28:11 +00:00
pk
f382e91b5e Add a field to identify the processor that has a process' FPU context. 1998-09-30 18:40:58 +00:00
pk
4826aac9cf Make the current FPU owner (`fpproc') a per-CPU entity. Unresolved issue
as yet: lazy FPU context switching may require co-operation from other
CPUs.
1998-09-30 18:38:57 +00:00
pk
8c29324cc7 Kernel configuration with multi-processor support. 1998-09-27 15:10:25 +00:00
pk
0a090af2c7 Add `ldstub()'. 1998-09-27 14:32:14 +00:00
pk
e6ce8bcfc7 sparc spin lock functions. 1998-09-27 14:31:18 +00:00
pk
0a1a6fb7e0 This file is no longer used 1998-09-26 20:51:45 +00:00
pk
166c2a5fa5 fix typo 1998-09-26 20:15:59 +00:00
pk
9f352b7e15 Stop all other CPUs upon entering a debugger. 1998-09-26 20:14:48 +00:00
pk
01e64c640c Implement mp_pause_cpus() and mp_resume_cpus(): pause and resume all
CPUs except the one running this code.
1998-09-26 20:13:56 +00:00
pk
6ad3a051e8 mp_{pause,resume,halt}_cpu() prototypes. 1998-09-26 20:12:06 +00:00
pk
8ddcd514a6 Use CPU start function in obp.c 1998-09-26 19:09:56 +00:00
pk
fe1cf94b9f Add wrappers for PROM's CPU start/stop functions. 1998-09-26 19:08:09 +00:00
pk
a89a10c394 Add file obp.c 1998-09-26 19:06:47 +00:00
pk
43c1cb852c Move PROM interface prototypes into openprom.h
Use the `openprom_addr' structure for passing around physical addresses.
1998-09-26 18:20:19 +00:00
pk
09a4cf6caa Move PROM interface routines into their own file. 1998-09-26 18:15:34 +00:00
pk
eb8de83739 eccmemctl' inadvertently got into the mandatory' list. 1998-09-25 11:40:16 +00:00
pk
27569e4050 Initialize pointer to the boot CPU's interrupt register. 1998-09-24 20:38:43 +00:00
pk
831354d6de Add `intreg' cpuinfo offset. 1998-09-24 20:37:17 +00:00
pk
58ab38cb69 Use per-CPU interrupt status register. 1998-09-23 11:07:28 +00:00
pk
9eca565a37 Make cgsix_sbus & cgsix_obio dependent on their respective attribute.s 1998-09-23 08:49:46 +00:00
pk
d6746389a4 The nmi_* routines are sun4m-only. 1998-09-23 08:44:51 +00:00
pk
aa1cf01930 Express per-processor interrupt registers in a C structure as well. 1998-09-22 13:42:26 +00:00
pk
bd37118769 Dup header. 1998-09-22 13:41:03 +00:00
pk
eca50c1c33 Flush cache after diddling with trap vectors. 1998-09-22 13:40:08 +00:00
pk
1186ba5102 Introduce a `flush entire cache' method. 1998-09-22 13:39:19 +00:00
pk
5afb0e8bcb Keep the per-processor interrupt status in the cpuinfo structure.
For now, map them to the fixed virtual addresses set up early in autoconf.c
1998-09-22 13:08:44 +00:00
chs
c945760779 sign-extend some operand types which need it. 1998-09-22 05:40:14 +00:00
pk
709360e3ce Fill the `bpp' slot. 1998-09-21 21:13:51 +00:00
pk
20f2898a0c Merge sun4 and sun4c version of memerr() again. 1998-09-21 10:32:00 +00:00
pk
af19654e85 We no longer need to access memerr() through a function pointer.
GC `cpumod' and `mmumod'.
1998-09-21 10:30:41 +00:00
pk
c3b26811ac We no longer need to access memerr() through a function pointer. 1998-09-21 10:29:20 +00:00
pk
ec34e18063 Don't map sbus `registers' on sun4c (i.e. sbus @ mainbus); it's almost
certainly not the control space we want..
1998-09-20 20:08:52 +00:00
pk
7a147080b8 Async arguments are no longer passed to the memory fault handler. 1998-09-20 20:01:15 +00:00
pk
4bf750b7df Add sun4m NMI handlers. 1998-09-20 20:00:09 +00:00
pk
d0d9bb7669 Dedicate a pair of entry points to handling sun4m level 15 (NMI) interrupts.
Hardware NMIs are generated on various fault conditions that take place
asynchronously to the instruction stream. Software NMIs are going to be used
for inter-processor communications.

Get synchronous fault information separately from asynchronous fault
information. Do the former right after taking a memory fault trap and
store the values in temporary locations within the cpuinfo structure (XXX),
so we can unconditionally clear the sync fault status register after
MMU probe operations. This all is to work around a Hypersparc feature
which could lead to loss of fault information because of the fault
status register getting locked.
1998-09-20 19:54:48 +00:00
pk
cd8dfa6798 Account for changes in struct cpuinfo & locore 1998-09-20 19:39:18 +00:00
pk
4128057c52 Split memory fault status function into synchronous' and asynchronous'
versions.
1998-09-20 19:37:50 +00:00
pk
2734182a74 Re-arrange the sun4m cases a bit.
Entry points no longer have async arguments.
1998-09-20 19:34:16 +00:00
pk
c3e742adfb Format string for SI register. 1998-09-20 19:31:37 +00:00
pk
b6da06d637 Name fault registers more like they're referred to in various docs. 1998-09-20 19:29:10 +00:00
pk
a1a94bc5fc Use the expected name for the config attach structure. 1998-09-19 16:50:31 +00:00
pk
0a6347a24d Provide an error entry point like sbus and memory. 1998-09-19 16:45:43 +00:00
pk
812eb8c1da Add %b format strings. 1998-09-19 16:44:59 +00:00
pk
25d48215a2 Map Sbus control registers. 1998-09-19 15:49:50 +00:00
pk
8381b55bd7 Add a bunch of SBus control register definitions. 1998-09-19 15:48:55 +00:00
pk
1bcd9d3bbb Pass the children register space in the attach arguments. 1998-09-19 15:47:18 +00:00
pk
ced4225429 Add `eccmemctl' device. 1998-09-18 20:19:12 +00:00
pk
b3c7ebb7cd Handle ECC memory control found on a number of machines.
Also defines an entry point for memory errors reported by module interrupts.
1998-09-18 20:18:10 +00:00