Commit Graph

5 Commits

Author SHA1 Message Date
scw bb210bda7e Split the nvram/rtc functionality away from the clock interrupt code
and attach it as `timekeeper0 at mainbus0'.
Use the MI mk48txx nvram/rtc access functions instead of home-grown
versions.

It should now be very easy to add a character device for the benefit
of userland access to NVRAM.
2001-08-12 18:33:12 +00:00
scw 7e2f2acb8e Flesh out the memory controller driver (at least for the MCECC chip)
and attach it at mainbus since it depends both PCCChip2 and VMEChip2
(or the VMEChip2 interrupter) starting first.

We can finally enable, detect and log DRAM ECC errors.
(The PROM disabled ECC checks by default)
2001-07-27 18:38:54 +00:00
scw 59ba4788ce Deprecate intrcnt/intrnames in favour of the generic evcnt(9) interface. 2001-05-31 18:46:07 +00:00
scw 7d191ffe77 Revamp the bus_space(9) implementation:
. use a structure for the tag instead of an integer constant,
 . add bus_space_{peek,poke}_N() (and G/C `badaddr()'),
 . fix a few drivers which have dependencies on the implementation.
2000-11-24 09:36:40 +00:00
scw 9c745dbd5e Merge 'scw_mvme68k_bus_space' branch with the trunk.
These changes add support for:

	o The MI VMEbus framework on both MVME147 and MVME167.
	o Enhancements to the existing MD bus_space(9) implementation.
	o Most of the bus_dma(9) API.
2000-03-18 22:33:02 +00:00