loadfile_machdep.h into /usr/include/hp300/, instead create a
link for machine and hp300 in ${.OBJDIR} like
sys/arch/alpha/stand/Makefile.buildboot does for alpha.
the bootinfo to be located in the first page of kernel text (which has
been zero-filled for a Very Long Time to allow us to unmap KVA 0); the
boot loader will place it there after loading the kernel image.
"To fully support self-modifying code in any situation, it is imperative that
a CPUSHA intrcution is executed before the execution of the first self-modified
instruction. The CPUSHA instruction has the effect of ensuring that there is
no stale data iin memory, the pipeline is flushed, and instruction prefetches
are repeated and taken from external memory."
I verified that this is the only way (I can think of) to make the sigtramp
regression test work on 68040. doing cpushl dc; cinvl ic; over the affected
address range, then nop (to synchronize the pipeline) is not enough; apparently
the nop does not FLUSH the pipeline and prefetch...
Note that the 68060 UM has copied the above cited passage, but in fact this is
not true. This might be connected to the fact that the 68060 does ensure
memory access order under most conditions.
remove GENERIC.v6 file (as it is part of GENERIC now).
"faith" interface is commented out by default as it is not really for
general use.
IPsec items are commented out as well, though we can enable "options IPSEC"
without export-related issue ("options IPSEC" will enable authentication
portion only). We may need to think about it again.
if you have problem compiling with INET6 on archs I do not have access to,
please contact me.
XXX what to do with arch/arm32/SHARK{,.v6}?
that is priority is rasied. Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.
This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).
XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX. This platforms still have this bug until their
XXX spl*() functions are fixed.
- fix emitrules() like emitfiles() to deal with the prefix (otherwise it
would attempt to find the file in the normal base for the NORMAL_C rule).
- add emitincludes() which adds include directives for each prefix to the
$INCLUDES variable in the makefile.
- add %INCLUDES to each Makefile.arch to deal with the above.
this makes "prefix" actually work in a usable manner, and now i can move
on to fixing compiler warnings (errors) in the ESP code. :)
- remove "need-flag" for mac68k esp driver, as it is not used in anywhere
and conflicts with IPsec ESP header.
This should be the only MD change in IPv6 support, except kernel config file.
Very sorry if you have any compilation problem with it (I believe it is okay).
If your favorite arch is not included in here, please add a
call to ip6intr() from softintr handle.
some internal reference counting on PT pages. We still allocate them
with the page fault routine (a wire-fault, now), but no longer free
PT pages from pmap_pageable().
has PAGEABLE and INTRSAFE flags. PAGEABLE now really means "pageable",
not "allocate vm_map_entry's from non-static pool", so update all map
creations to reflect that. INTRSAFE maps are maps that are used in
interrupt context (e.g. kmem_map, mb_map), and thus use the static
map entry pool (XXX as does kernel_map, for now). This will eventually
change now these maps are locked, as well.
the child inherits the stack pointer from the parent (traditional
behavior). Like the signal stack, the stack area is secified as
a low address and a size; machine-dependent code accounts for stack
direction.
This is required for clone(2).
define a flag UVM_PGA_USERESERVE to allow non-kernel object
allocations to use pages from the reserve.
use the new flag for allocations in pmap modules.
When we put a page on the collection list, we must subtract NPVPPG from the
total free count: one for each pv_entry that's free in that page, and one for
each free pv_entry in other pages that we're going to eat by moving the ones
in the page being collected.
* Map the message buffer with access_type = VM_PROT_READ|VM_PROT_WRITE `just
because'.
* Map the file system buffers with access_type = VM_PROT_READ|VM_PROT_WRITE to
avoid possible problems with pagemove().
* Do not use VM_PROT_EXEC with either of the above.
* Map pages for /dev/mem with access_type = prot. Also, DO NOT use
pmap_kenter() for this, as we DO NOT want to lose modification information.
* Map pages in dumpsys() with VM_PROT_READ.
* Map pages in m68k mappedcopyin()/mappedcopyout() and writeback() with
access_type = prot.
* For now, bus_dma*(), pmap_map(), vmapbuf(), and similar functions still use
access_type = 0. This should probably be revisited.
"BUS_SPACE_ALIGNED_POINTER()".
Equal to the param.h "ALIGNED_POINTER()" normally, but obeys additional
requirements of the bus_space_xxx_n() macros. (BUS_SPACE_DEBUG)
cache). This helps to avoid cache alias problems, and can improve performance
in the case where physical pages have multiple mappings (since the pages will
not have to be marked cache-inhibited).
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.
mappings for CADDR1 and CADDR2, unless we're built w/ -DDEBUG. Since
these addresses are only used in these routines, we can "lazily invalidate"
them by just using them again. This makes these routines a teeny bit faster,
as it saves 1 or 2 TBIS's per call.
Suggested by Leo Weppelman <leo@netbsd.org>.
pmap, forget all of the mappings for the user address space for that pmap.
This causes the PT pages to be freed so that they can be reclaimed by the
VM system. [*]
[*] Actually, in the current implementation, it merely causes the wiring
count on the PT pages to drop to 0, which allows them to be reclaimed by
the pagedaemon. Handling of PT pages needs to be completely rewritten.
pmap_remove() for the temporary addresses. This is completely unnecessary
as the temps are used ONLY for these routines, and we have better control
over the mapping by manipulating the PTE ourself. On VAC systems, cache-
inhibit the mapping to prevent wasting a cache load.
These routines are now significantly faster.
Add a DIAGNOSTIC check in pmap_enter() for kernel pmap and (CADDR1 or CADDR2);
nothing should be adding mappings there via that interface.
