Commit Graph

1305 Commits

Author SHA1 Message Date
thorpej
344d11c5f4 Make it possible to strip this down a little more. 1999-12-14 20:55:27 +00:00
thorpej
58ffb9ba82 Include loadfile() (and a.out support for loadfile()) in libsa. 1999-12-14 20:54:04 +00:00
thorpej
25c48ec858 First cut at loadfile() support for the hp300 boot program. Doesn't
work yet (kernel fails before MMU can be enabled).
1999-12-14 20:52:58 +00:00
thorpej
3f9e459666 Make sure the compiler doens't reuse the registers we use to convey
information to the kernel.
1999-12-14 19:14:49 +00:00
thorpej
56b2a5174c Add a bootinfo facility, as is used on i386 and pmax, ports. We expect
the bootinfo to be located in the first page of kernel text (which has
been zero-filled for a Very Long Time to allow us to unmap KVA 0); the
boot loader will place it there after loading the kernel image.
1999-12-14 17:51:20 +00:00
thorpej
a817ac2b7c Add COMPAT_LINUX, COMPAT_SVR4, EXEC_ELF32. 1999-12-14 17:46:05 +00:00
ragge
26e1b45757 clrnd()/clbase() discarding. 1999-12-05 11:56:30 +00:00
ragge
0513268399 CL* discarding. 1999-12-04 21:13:19 +00:00
is
14ed33e42e Fix typo (&& -> &). 1999-11-28 20:30:57 +00:00
is
df61f0409e From the 68040 User Manual, page 4-10:
"To fully support self-modifying code in any situation, it is imperative that
a CPUSHA intrcution is executed before the execution of the first self-modified
instruction. The CPUSHA instruction has the effect of ensuring that there is
no stale data iin memory, the pipeline is flushed, and instruction prefetches
are repeated and taken from external memory."

I verified that this is the only way (I can think of) to make the sigtramp
regression test work on 68040. doing cpushl dc; cinvl ic; over the affected
address range, then nop (to synchronize the pipeline) is not enough; apparently
the nop does not FLUSH the pipeline and prefetch...

Note that the 68060 UM has copied the above cited passage, but in fact this is
not true. This might be connected to the fact that the 68060 does ensure
memory access order under most conditions.
1999-11-25 20:30:38 +00:00
itojun
e9a0023b37 bring in content of GENERIC.v6 into GENERIC.
remove GENERIC.v6 file (as it is part of GENERIC now).

"faith" interface is commented out by default as it is not really for
general use.
IPsec items are commented out as well, though we can enable "options IPSEC"
without export-related issue ("options IPSEC" will enable authentication
portion only).  We may need to think about it again.

if you have problem compiling with INET6 on archs I do not have access to,
please contact me.

XXX what to do with arch/arm32/SHARK{,.v6}?
1999-11-21 14:00:37 +00:00
fvdl
8bec119fcc Add commented out option SOFTDEP to all GENERIC kernels. 1999-11-15 19:10:44 +00:00
fvdl
d116707af0 Add
prefix ../gnu/sys
cinclude "conf/files.softdep"
prefix

to all std.* files, so that soft dependencies can be activated using
"options SOFTDEP".
1999-11-15 19:00:25 +00:00
thorpej
52806c2c2a Fix typo in previous. 1999-11-14 19:20:27 +00:00
thorpej
36ff5d93e8 Backout my libsa changes. 1999-11-13 21:17:56 +00:00
thorpej
1946167939 Update for pmap_enter() API change. No functional difference. 1999-11-13 00:30:26 +00:00
thorpej
47f5c977ef Don't reference libkern.h. 1999-11-11 20:28:04 +00:00
thorpej
e29afb6f98 No longer need to build libkern. 1999-11-11 20:27:42 +00:00
thorpej
d642bd03d1 Add register prefixes. 1999-11-11 17:08:37 +00:00
thorpej
e9e011443c Add register prefixes that I missed before. 1999-11-10 00:02:23 +00:00
kleink
1c2019b5a8 Rip protection against multiple inclusion from wrapper headers. 1999-11-09 21:34:03 +00:00
he
09e6fcd222 Print drive vendor_id/product_id/revision strings also for SCSI-3 devices.
before: sd0 at oscsi0 targ 0 lun 0: type 0x0, qual 0x0, ver 3
after:  sd0 at oscsi0 targ 0 lun 0: <IBM, DGHS09U, 0350> (SCSI-3)
1999-10-31 12:36:30 +00:00
thorpej
909f85b9dd Add register prefixes. 1999-10-26 01:49:38 +00:00
itohy
cef3e31058 Fix the problem that single-step tracing of a trap instruction
drops the system into kernel debugger.
1999-10-26 00:20:34 +00:00
thorpej
b2d8bf4680 Next sweep: stack pointers, FP regs, and several control registers. 1999-10-24 19:12:44 +00:00
thorpej
6ac32cdbc5 Next sweep of adding register prefix: %d0 - %d7. 1999-10-24 18:35:25 +00:00
thorpej
2375e365bc First sweep of adding register prefix: %a0 - %a7. 1999-10-21 21:10:24 +00:00
thorpej
1b38b2e234 Remove ipfilter, add IPv6 and IPSec. 1999-09-19 21:20:43 +00:00
thorpej
64c5200dba Correct a comment: aging `basalt' is no longer a file server, but now
just a mere workstation.
1999-09-19 21:13:44 +00:00
thorpej
d65238f17d Add SYSV* IPC options. 1999-09-19 21:12:43 +00:00
thorpej
11cae42531 Centralize the declaration and clearing of `cold'. 1999-09-17 19:59:35 +00:00
chs
b9604a3f30 make this compile again after PMAP_NEW cleanup. 1999-09-16 14:52:06 +00:00
thorpej
3b01d1b872 Rename the machine-dependent autoconfiguration entry point `cpu_configure()',
and rename config_init() to configure() and call cpu_configure() from there.
1999-09-15 18:10:33 +00:00
chs
f3a668ed84 eliminate the PMAP_NEW option by making it required for all ports.
ports which previously had no support for PMAP_NEW now implement
the pmap_k* interfaces as wrappers around the non-k versions.
1999-09-12 01:16:55 +00:00
bad
1a3995bac1 In apciparam() in the ospeed == 0 case, actually set the cfcr to the new
value.
1999-09-10 22:49:33 +00:00
mycroft
c3e1f6741d A foolish consistency. 1999-08-30 18:58:01 +00:00
thorpej
2cf3330a1b Garbage-collect reference to <sys/dmap.h>. 1999-08-23 22:29:37 +00:00
simonb
06a92524c2 Include <sys/bswap.h> for function prototypes. i386, pc532 and vax
still include <machine/byte_swap.h> and define macros for some of
the bswap*() functions.
1999-08-21 05:39:51 +00:00
simonb
299578ebd5 Spell "privilege" correctly (correct spelling from Jonathan Stone). 1999-08-16 02:59:22 +00:00
bad
9e8bff3633 Another sacrifice to appease egcs: wrap "if .. if .. else" in braces. 1999-08-13 11:40:46 +00:00
thorpej
ba76e54050 Use C-style comments. 1999-08-12 10:46:33 +00:00
thorpej
28fb7c1eb8 Define cpu_number() as discussed on tech-smp. 1999-08-10 21:08:05 +00:00
thorpej
eb20bbc780 Change the semantics of splsoftclock() to be like other spl*() functions,
that is priority is rasied.  Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.

This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).

XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX.  This platforms still have this bug until their
XXX spl*() functions are fixed.
1999-08-05 18:08:08 +00:00
thorpej
868dfcb228 Store computed PSL values in an array indexed by abstract interrupt
level, rather than individual shortwords.
1999-08-01 21:50:17 +00:00
thorpej
d721481d50 Make sure the branch target of the delay loop is aligned to a cache
half-line (8-byte) boundary.  Inspired by a discussion w/ Scott Reynolds.
1999-08-01 21:32:17 +00:00
thorpej
22d6c3f13b Fix APCI console initialization; we were forgetting to update cn_tab.
From Christoph Badura.
1999-08-01 21:30:21 +00:00
thorpej
9c48987e94 Ooops, add a missing break. 1999-08-01 18:17:26 +00:00
thorpej
749eee308d If building without ITECONSOLE, don't install our own NMI handler. Just
leave the ROM's NMI handler in place.
1999-07-31 21:49:03 +00:00
thorpej
f4da661b4a Nuke the DCA check. ACPI can only be console on a 425e. 1999-07-31 21:17:08 +00:00
thorpej
c870d5243c Skip "serial 1" on non-425e models. It's mapped to DCA at 9 on every
other 4xx model, and the "not configured" could be pretty annoying.
1999-07-31 21:15:20 +00:00