as the Shark's CS8900 Ethernet, which want to use the DMA controller in
this mode (as opposed to single mode).
[Editor's note: committed from a Shark using a new bus_dma back-end
and a CS8900 driver converted to use the MI code :-]
before it can be useful, and [B] #ifdefs do not belong at every call site,
a common API should be defined and the implementations conditionalized, not
the calls. Duhh.
Also, remove the initial XXX mystery_icu debugging code.
Like the 1000A, the AlphaServer 1000 has a daughtercard assembly that
integrates the CPU and core logic, so these can be ev4/apecs or ev5/cia.
New systype, and, sigh, another way of doing interrupts and another
mystery icu.
Kill off some EVCNT_COUNTERS calls, since [A] it has to be rewritten anyway
before it can be useful, and [B] #ifdefs do not belong at every call site,
a common API should be defined and the implementations conditionalized, not
all the calls. Duhh.
-display DEC special graphics and DEC technical characters as far as
possible
-implement the font switching controls (need documentation!)
-behave well if double-width characters are requested
-simplify the state machine: store CSI command modifiers in variables
instead of dedicating own states to each of them
which contain 'standard' com- and lpt-type ports. Some of these present
as PCI simple-communications/serial or simple-communications/parallel
devices, but many do not. (Additionally, there is no document that I can
find that describes the "specific well-konwn register-level" description
of how the 'standard' devices' config space headers shold work.) Eventually,
some of the devices driven by this code should become simple pci attachments
for the 'lpt' and 'com' drivers, but that requires solid documentation.
the BAR-printing function to print a name for the register, factor out
a common register-bits function which can handle the fact that type 2
headers have a different size than is usual, and actually do something
useful with the rest of the bits in the type 2 header.
gwr