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7 Commits

Author SHA1 Message Date
wiz
456dff6cb8 Spell 'occurred' with two 'r's. 2001-09-16 16:34:23 +00:00
tsutsui
5dca757b0e Swap the order of u_int16_t member in Tx/Rx descriptors 
on big endian machines.

"Big endian mode" of smc83c170 actually works!
(i.e. no htole??()/le??toh() functions are needed.)
 2000-05-26 00:20:26 +00:00
thorpej
456af6d558 Reduce the number of transmit fragments to 16. 1999-08-27 19:21:32 +00:00
thorpej
d6c9ec0a2e Make this "should work" on big endian systems. 1999-07-27 00:55:34 +00:00
thorpej
7b8168e675 Adapt to new MII code. 1998-08-11 00:12:52 +00:00
thorpej
79f77cc9ce The mystery bit in the TEST register is actually the CLOCK TEST bit. 1998-07-20 20:45:06 +00:00
thorpej
5852faaf84 Device driver for the SMC 83c170 Ethernet PCI Integrated Controller (EPIC/100) 
used in the SMC EtherPower II.

Media control isn't yet supported, due to some MII infrastructure
problems which I hope to address soon.  This isn't a huge deal, since
the PHY defaults to auto-negotiate mode.

Also, the device just programs the multicast hash table to accept all
multicast, to avoid a hardware bug that causes the multicast address
filter to lose in 10Mb/s mode.  This bug will be fixed in a more sane
way once the media control issues are dealt with.
 1998-06-02 01:29:41 +00:00