Commit Graph

421 Commits

Author SHA1 Message Date
thorpej 7ca7bdb37c Use aprint_normal() for cfprint routines. 2003-01-01 00:39:19 +00:00
thorpej b96bc0d7bc Use CFATTACH_DECL(). 2002-10-02 04:06:36 +00:00
thorpej 9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
provos 0f09ed48a5 remove trailing \n in panic(). approved perry. 2002-09-27 15:35:29 +00:00
thorpej d1ad2ac4f2 Rather than referencing the cfdriver directly in the cfdata entries,
instead use a string naming the driver.  The cfdriver is then looked
up in a list which is built at run-time.
2002-09-27 02:24:06 +00:00
mycroft 98763c9300 Set addr_shift and size_shift to 0 for the dense region. 2002-07-22 20:05:23 +00:00
thorpej 204183c0fa * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
2002-05-16 01:01:28 +00:00
thorpej 90e921d836 Rename alpha_pci_decompose_tag() to pci_decompose_tag(). There *is*
some MI PCI code that uses it, and soon there will be more.  (The rationale
for not making it available previously was that it could be mis-used, but
that's true of a lot of things.)
2002-05-15 16:57:41 +00:00
ross ddbaa8d2e8 Tweak boilerplate to kill assembler warning (netbsd pr alpha/15119) 2002-01-23 21:33:19 +00:00
thorpej 6a434bacd5 Don't forget to fill in the DMA tag when attaching the AGP
controller.
2001-10-06 02:51:42 +00:00
thorpej e9d1fccd30 BWX-addressable space is aways linear, so always allow BUS_SPACE_MAP_LINEAR
requests to succeed (and ignore BUS_SPACE_MAP_PREFETCHABLE, since it makes
no difference in BWX-addressable space).
2001-09-16 03:50:01 +00:00
thorpej 79ae830243 Add AGP support (oops, forgot to commit this file with the last batch). 2001-09-16 02:09:47 +00:00
thorpej 17d975073d Oops, don't need to fill in pcibus_attach_args twice. 2001-09-15 04:50:59 +00:00
thorpej 927debe92b Attach "agp" to the AMD-751 PCI host controller (Alpha UP1000/UP1100). 2001-09-15 04:33:37 +00:00
thorpej 6658cbc629 Only filter out the PCI_ID_REG in irongate_conf_read(). 2001-09-15 04:31:40 +00:00
thorpej 4ce0b90ae3 Typos, pointed out by Luke Mewburn (gee, I guess I built a kernel
other than GENERIC).
2001-09-04 16:14:49 +00:00
thorpej 102190b8fe Implement bus_space_mmap(). 2001-09-04 05:31:27 +00:00
mjacob 7a43c0e46b Fixed the one minor buglet that kept 8200s from working
(SCB_VECTOIDX(vec) - SCB_IOVECBASE] -> SCB_VECTOIDX(vec - SCB_IOVECBASE))

Sigh. This is all very good work- this new interrupt stuff. Yet like the
last time my good friend Jason 'simplified' things, we lost information.
It used to be you could tell which specific slot an interrupt was frame
based upon the vector. Now you can't because they're allocated dynamically.
Oh well- it's not all that important.
2001-08-13 23:36:30 +00:00
thorpej 0fb6b9a8f8 Rework the interrupt code, shaving some cycles off in the process.
Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector.  This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).

We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.
2001-07-27 00:25:18 +00:00
thorpej 13e63c6a43 Take a guess and initialize the prefetch threshold to 256 bytes. Haven't
found this one in the manual yet.
2001-07-19 19:09:22 +00:00
thorpej b0256ef005 DWLPx has a 256-byte DMA prefetch threshold. 2001-07-19 18:59:41 +00:00
thorpej 1e21ada1d9 MCPCIA has a 256 byte DMA prefetch threshold. 2001-07-19 18:55:40 +00:00
thorpej c563df226b The T2 has a 256 byte DMA prefetch threshold. 2001-07-19 18:50:25 +00:00
thorpej e6ab362da0 The LCA isn't supposed to have a DMA prefetch threshold, but experience
has shown is that if we don't allocate a spill page, we get a machine
check.  So, initialize the threshold to 256 bytes.
2001-07-19 18:47:38 +00:00
thorpej 4c4c88dbb7 ALCOR/ALCOR2/PYXIS have a 256-byte DMA prefetch threshold. 2001-07-19 18:42:42 +00:00
thorpej 908464bef9 APECS has a 256 byte DMA prefetch threshold. 2001-07-19 18:39:29 +00:00
thorpej 18490eff62 Add support for mbufs to the Alpha SGMAP DMA maps. 2001-07-19 06:40:01 +00:00
elric 99e8b114e0 So, the PowerStorm 4d20 a.k.a. 32bit TGA2 w/ IBM RGB561 RAMDAC was causing
the kernel to panic since it is recognised as a TGA and the TGA driver
doesn't [yet] know what to do with it.

This patch fixes that by:
	o  making tgamatch() try to actually figure out what kind
	   of TGA card is there, rather than simply relying on the
	   vendor/product ids.
	o  creating a tga_cnmatch() so that the console code in
	   arch/alpha/pci/pci_machdep.c can cause the same to occur.
	o  breaking up some of tga_getdevconfig() into a few different
	   functions to re-use code that would have been duplicated.
	o  changed arch/alpha/pci/pci_machdep.c so that it calls out
	   to tga_cnmatch() if DEVICE_IS_TGA() matches before it decides
	   to attach the console as a TGA.

Addresses PR: port-alpha/12923
2001-07-16 00:55:16 +00:00
thorpej 294259060c bzero -> memset 2001-07-12 23:25:39 +00:00
toshii 4866f1a22b Fix typo. s/extention/extension/ 2001-07-05 08:38:24 +00:00
thorpej 5291142217 Determine the size of the B-Cache earier, and initialize the
number of page colors accordingly.
2001-05-02 01:24:29 +00:00
ross 2df695b1e4 o IEEE 754 floating-point completion code.
o Implement the architected FP_C "Floating Point Control Quadword"
2001-04-26 03:10:44 +00:00
thorpej a51a1d8cdd - Get rid of the prot bits in the mem_clusters[] array when
reserving RAM in the bus_mem extent map.  Problem pointed
  out by Artur Grabowski.
- Work around a slightly annoying bit of behavior exhibited by
  the UP1000 firmware.  The UP1000 firmware reports the space
  consumed by the "ISA hole" in the same MDDT entry as two
  chunks of RAM (on either side of the hole) used by the PALcode,
  all as one "reserved for PALcode" chunk.  We must take this
  into account when reserving RAM in the bus_mem extent map.
2001-04-17 21:52:00 +00:00
ross e84bc939c9 On alternate Tuesdays, SRM uses a different method of identifying
PCI interrupts routed to the ISA ICU.
2001-03-27 01:39:51 +00:00
ross 5b36d84a9c Don't panic until DEFCON 1. 2001-03-25 06:38:50 +00:00
cgd 82f3142780 fix NetBSD RCS id tags 2001-02-27 19:04:39 +00:00
thorpej db36913c87 The code that creates/destroys SGMAP DMA maps is the same; put it
in a common place and share it.
2001-01-03 19:15:59 +00:00
sommerfeld 851de295eb Change pci_intr_map to get interrupt source information from a "struct
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".

This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.

Tested on alpha and i386; welcome to 1.5Q
2000-12-28 22:59:06 +00:00
thorpej f363b73f87 Add support for the AlphaServer 2100 (Sable) and the AlphaServer 2100A
(Lynx), written from scratch by me over a year ago, but never committed
to the tree because there was a bug I could never quite find.  I have
fixed a few problems in the code, but still don't know if that bug is
quite fixed.  Since I don't have access to the hardware directly, I'll
have to call for testers again.
2000-12-21 20:51:53 +00:00
thorpej ad4f387a4c Put back the INITIALLY_{ENABLED,LEVEL_TRIGGERED}() PROM brain-damage
work-around.  It's required in order for the DEC Multia (a very
brain-damaged little machine) to work properly.

Submitted by Juergen Weiss <weiss@uni-mainz.de>, addresses
port-alpha/11202.
2000-12-18 21:49:08 +00:00
thorpej 5f3a256833 Allocate the DMA windows out of the PCI memory extent map after
DMA is initialized.
2000-11-29 06:30:09 +00:00
thorpej 96294f7b26 Do the additional PCI memory initialization after configuring DMA. 2000-11-29 06:29:10 +00:00
thorpej 8f20972db2 Revert previous -- we'll do it differently. 2000-11-29 06:21:12 +00:00
thorpej d615083897 The AMD 751 doesn't have DMA windows, so allocate the RAM out of the
PCI memory extent map.  Bad things will happen if we try to assign
a device where RAM is mapped into PCI space.
2000-11-29 05:56:49 +00:00
thorpej 8ebabb1aae Increase the number of static extent descriptors from 8 to 16,
and add a means for calling a chip-specific init hook.
2000-11-29 05:53:29 +00:00
thorpej 73265fa0c9 Duh, don't need SGMAP-related includes on this chipset. 2000-11-18 05:56:20 +00:00
thorpej d760e0b407 Add code to read the EISA configuration NVRAM as set up by
an EISA Configuration Utility.  Code to access this data
is forthcoming.

XXX This could probably be made MI at some point.
2000-07-29 23:18:46 +00:00
thorpej 1204c1faaf Oops, treat 2100A_A500 just like 2100_A500 in every place necessary. 2000-07-12 21:02:14 +00:00
thorpej 249773b538 Deal with another odd need of the Sable/Lynx systems, which need to
have an ISA chipset present before the PCI-EISA bridge has been
attached (because the STDIO module has an ISA DMA-using device,
the floppy controller, connected to it).
2000-07-12 20:50:00 +00:00
mrg c88e94a407 remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h> 2000-06-29 08:58:45 +00:00