Aren/NetBSD
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2 Commits

Author SHA1 Message Date
fredb
4648495436 The variables to hold the registers don't need to be declared volatile. 
Pointed out by Simon Burge on tech-kern.
 2004-02-04 01:58:44 +00:00
fredb
0dcb02ec41 Enable the 8X clock on the SIIG Cyberserial serial and combination PCI 
cards at attachment time, in order to support bit rates greater than 115K,
as discussed on tech-kern.
 2004-02-03 19:51:39 +00:00