Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
116,922 Commits 606 Branches 0 Tags 3.1 GiB
245108acf3
Commit Graph

65829 Commits

Author SHA1 Message Date
christos
1dc335c017 SA_SIGINFO changes. 2003-09-06 22:03:09 +00:00
christos
a7794f4529 SA_SIGINFO changes. This is 1.5Z 2003-09-06 22:01:20 +00:00
kleink
1b91dce6c3 Rearrange bus_space initialization slightly, taking advantage of being 
able to pass a bus_space with an extent already assigned to
bus_space_init().  This eliminates creating the extents twice, and
makes it a bit easier to read.
 2003-09-06 21:07:00 +00:00
jdolecek
465f95a5ec Embed information about kernel version and some of used kernel options 
into compiled LKMs. Check this information when LKM is loaded into kernel
and refuse LKMs not matching currently running kernel. Provide LMFORCE
ioctl to skip this check for those feeling adventurous.

as discussed on tech-kern@, thanks to feedback from Bill Studenmund and others
 2003-09-06 19:08:53 +00:00
cjep
3f3139be59 comment typo 2003-09-06 18:40:15 +00:00
fvdl
5a759ef06c Move the bulk of pci_intr_string into a seperate intr_string function. Use 
that new function to print the pciide compat interrupt in pciide_machdep.c.
Share pciide_machdep.c between amd64 and i386.
 2003-09-06 17:44:36 +00:00
fvdl
40b81ea5a1 If possible, put the device name of the APIC used into the interrupt string, 
not "apic N". This makes it easier to match vmstat output with dmesg output.
 2003-09-06 14:55:50 +00:00
fvdl
631d339e09 When establishing the ACPI SCI, make sure it's always active low (as well 
as level-triggered). Do this by changing the MP config entry that was
set up for the interrupt. Do not change anything if there was an ACPI
interrupt source override, assume that this contains the correct
information already.
 2003-09-06 14:38:41 +00:00
jdolecek
4b005d1443 sprinkle __attribute__((__packed__)) to structures representing on-disk data 
this hopefully fixes problem with reading filecore FS under i386, reported
on current-users@ (thread 'acorn32 disk on i386')
 2003-09-06 13:56:42 +00:00
itojun
5c9706bb41 correct seed generation. sync w/ kame 2003-09-06 13:47:09 +00:00
jdolecek
f7394f424e switch over to DISPATCH(), it calls the 'load' entry point in right 
order now
 2003-09-06 13:34:56 +00:00
rearnsha
5d78bf50ac ANSIfy. 2003-09-06 13:34:29 +00:00
jdolecek
c8390a7dbc simplify struct sysent handling a bit more; store old sysents before 
overwriting them with LFS syscalls, and restore to original contents
on module unload
 2003-09-06 13:30:50 +00:00
itojun
37c3c44062 fix comment, from kame 2003-09-06 13:30:40 +00:00
jdolecek
f67c969fe0 ANSIfy 2003-09-06 13:20:41 +00:00
jdolecek
d21da2d8e2 switch to DISPATCH() - it now calls the 'load' routine in order we want here 
while here, simplify struct sysent handling a bit, fixing setting of sy_flags
 2003-09-06 13:16:17 +00:00
jdolecek
77ec7812ff when loading LKM, call the 'load' entry point _after_ general setup 
done by lkmdispatch(), not before - this is what all existing LKMs using
'load' entry point want, and allows those LKMs to just use DISPATCH() instead
of custom code

LKM_VERSION not bumped, another LKM change is going in soon
 2003-09-06 13:12:59 +00:00
rearnsha
81594136ec irqhandler.h and related baggage now obsolete. 2003-09-06 13:01:29 +00:00
rearnsha
3a05158011 Remove include of ifpga/irqhandler.h. 2003-09-06 12:58:48 +00:00
rearnsha
9066202e72 Delete GENASSYM_EXTRAS. 2003-09-06 12:57:22 +00:00
rearnsha
b548db6846 Obsolete. 2003-09-06 12:36:29 +00:00
manu
f88ed86b14 regen 2003-09-06 11:50:25 +00:00
manu
bfc0bb09ef Convert dev_t for mknod 2003-09-06 11:50:00 +00:00
rearnsha
8395e3535e config option is now CPU_ARM10. 2003-09-06 11:41:11 +00:00
rearnsha
256da36a1c Switch to using generic soft interrupts. 2003-09-06 11:31:20 +00:00
rearnsha
fec013d595 Fix incorrect definition of IFPGA_SC_LBFCODE_BEN1 and missing 
definition of IFPGA_SC_LBFCODE_BEN0.
Add definitions for unused interrupt bits and a suitable mask (preparation
for switch to generic soft-ints code).
 2003-09-06 11:27:01 +00:00
rearnsha
333d22f36e Fix handling large values of delay when the timer might wrap. 2003-09-06 11:21:44 +00:00
manu
2add551792 regen 2003-09-06 11:18:50 +00:00
manu
e0a2c17b59 Correctly translate dev_t in stat/fstat/lstat 2003-09-06 11:18:03 +00:00
rearnsha
7c9aacc774 Add bouncing support 2003-09-06 11:12:53 +00:00
rearnsha
a25a2641d9 General cleanups of the bootstrap code 2003-09-06 10:57:12 +00:00
jdolecek
ffac54bf71 convert over to standard LKM macros; done by defining the VFS 
and DEV parts in separate functions, and calling those dispatch
functions from coda_lkmentry()
 2003-09-06 10:56:37 +00:00
rearnsha
b867034038 When an Integrator board has less than 256M of SDRAM fitted, the 
memory that is "obscured" by the SSRAM is visible at a wrapped address.
So we can use the full amount of SDRAM in almost all cases.
 2003-09-06 10:28:26 +00:00
rearnsha
15f5c8f7db Remove a verbose-boot message that kills the bootstrap (since the 
console port mapping has just been moved).
 2003-09-06 10:21:19 +00:00
rearnsha
0663dd6d22 The third argument to pmap_map_chunk is the pa not the va. 2003-09-06 10:18:07 +00:00
rearnsha
20b73e2b48 Add a flags field to _PhysMem structure so that we can describe 
attributes of memory regions (BOOT_DRAM_CAN_DMA, BOOT_DRAM_PREFER).
Rearrange order of BootConfig members so that the describing how many
dram regions we have preceeds the descriptions of each region.
 2003-09-06 10:08:13 +00:00
rearnsha
d35277ea35 Default all builds to not have debug information. Significantly 
reduces disk space needed for a make release, especially if using
dwarf2 debug.
 2003-09-06 10:00:51 +00:00
rearnsha
b805fdb7fa Add build-system support for ARM10. 2003-09-06 09:48:47 +00:00
rearnsha
46af0c9f17 Make sure _ARM32_BUS_DMA_PRIVATE is defined before we pull in any 
include files to avoid problems with the rats nest of dependencies.
 2003-09-06 09:46:37 +00:00
rearnsha
da86d47fb0 Support for initializing ARM10 processors in write-through mode. 2003-09-06 09:44:10 +00:00
rearnsha
ec2b5e2dfd Support for ARM10E class devices. 2003-09-06 09:42:12 +00:00
rearnsha
1eba58255a Support for ARM10. Extract some additional information about the 
dcache so that we can have cache cleaning code that works for any
permitted arm10 cache architecture.
 2003-09-06 09:31:37 +00:00
rearnsha
bb00ee6bce Add a function to read the processor cache configuation register. 2003-09-06 09:14:52 +00:00
rearnsha
637a44c215 Processor-specific operations for ARM10 class devices. 2003-09-06 09:12:29 +00:00
rearnsha
d4e1e335e8 Add support for ARM10 class processors. 2003-09-06 09:10:46 +00:00
rearnsha
a515ec698a Add processor-specific declarations for ARM10 class processors. 2003-09-06 09:08:35 +00:00
rearnsha
446ca3f32d Fix declarations of primary cache variables, so that they are 
declarations, not definitions.
 2003-09-06 09:04:52 +00:00
rearnsha
cfcc3a8ad4 Add support for ARM10 class devices. 2003-09-06 08:55:42 +00:00
jdolecek
67d5719f24 ANSIfy 2003-09-06 08:45:18 +00:00
rearnsha
e1f8618cbd Add arm1020E cpu id 2003-09-06 08:43:02 +00:00