1fead733d9
PCI overhaul.
2001-07-20 00:07:12 +00:00
93d4ebfb55
Don't fall over if the TOD clock could not be found.
2001-07-19 23:59:51 +00:00
7e8421fa5b
Also attach apropriate devices named "serial".
2001-07-19 23:55:50 +00:00
0c4549ab71
Don't bother flushing cache lines for un-cached accesses.
2001-07-19 23:47:37 +00:00
b3edeb5745
Add 'ide' to the IPL table and fix things so we don't rely on the PROM
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mapping things in for us.
2001-07-19 23:40:36 +00:00
76665dc463
Small code cleanup.
2001-07-19 23:38:11 +00:00
5150b485b4
Do ignore unregistered interrupts instead of faulting.
2001-07-19 23:37:17 +00:00
12fbdb7bb3
Make bus_space_debug default to off.
2001-07-19 23:35:42 +00:00
075ed881ad
Print out PID and command name for alignment faults.
2001-07-19 23:33:09 +00:00
a60e790efe
Make a bigger hole between kernel text and data.
2001-07-19 23:31:06 +00:00
030941bc0d
Only match the "gbus" on the primary CPU's CPU module.
2001-07-19 20:34:08 +00:00
13e63c6a43
Take a guess and initialize the prefetch threshold to 256 bytes. Haven't
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found this one in the manual yet.
2001-07-19 19:09:22 +00:00
b0256ef005
DWLPx has a 256-byte DMA prefetch threshold.
2001-07-19 18:59:41 +00:00
1e21ada1d9
MCPCIA has a 256 byte DMA prefetch threshold.
2001-07-19 18:55:40 +00:00
c563df226b
The T2 has a 256 byte DMA prefetch threshold.
2001-07-19 18:50:25 +00:00
e6ab362da0
The LCA isn't supposed to have a DMA prefetch threshold, but experience
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has shown is that if we don't allocate a spill page, we get a machine
check. So, initialize the threshold to 256 bytes.
2001-07-19 18:47:38 +00:00
4c4c88dbb7
ALCOR/ALCOR2/PYXIS have a 256-byte DMA prefetch threshold.
2001-07-19 18:42:42 +00:00
908464bef9
APECS has a 256 byte DMA prefetch threshold.
2001-07-19 18:39:29 +00:00
63bc6c1370
Since the SGMAP buffer load subroutine doesn't need to modify
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the segment index, don't pass it by reference.
2001-07-19 18:20:20 +00:00
b4c68ef164
Descend into wrtvid in all but the install pass.
2001-07-19 18:18:30 +00:00
77e1f86ad4
Implement dmamap_load_uio for SGMAPs.
2001-07-19 18:08:54 +00:00
e60fffea3b
Pay attention to BUS_DMA_READ; don't need to allocate a spill
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page if it is set.
2001-07-19 17:08:44 +00:00
1bc6d2cee9
Fix typo (`information' has an 'r').
2001-07-19 16:13:00 +00:00
babefc5331
Add BUS_DMA_READ and BUS_DMA_WRITE flags, that hint the back-end
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at dmamap load time that the mapping will be used for a unidirectional
transfer of the specified direction.
2001-07-19 15:32:10 +00:00
b70733d358
Since DMA frobbing can be done at interrupt time by devies at
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multiple levels, protect the extent map w/ splvm().
2001-07-19 14:26:54 +00:00
9ae3738ab5
adhoc battery event creation for some vr machines.
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XXX: temporary
2001-07-19 13:11:27 +00:00
ab7530a18b
change BATTERY event order.
2001-07-19 11:38:01 +00:00
b9d7f75a06
add more BATTERY events.
2001-07-19 11:36:07 +00:00
18490eff62
Add support for mbufs to the Alpha SGMAP DMA maps.
2001-07-19 06:40:01 +00:00
8617f2c7f5
Simplify the SGMAP code a bit, and move SGVA allocation out of a
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common routine into the individual load routines, since each load
routine needs to muddle with the "internals" of this operation.
Add a `prefetch threshold' member to the bus_dma_tag_t, so that
eventually we can determine whether or not to allocate a spill
page on a per-mapping basis.
2001-07-19 04:27:37 +00:00
fd5247de51
By adding a well-placed space or two, 'make depend' no longer loses
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due to a directory name like 'arc.current' messing up a sed substitution.
2001-07-19 01:46:15 +00:00
09ab6c5da8
Duh, to set the user stack pointer, you have to frob the PALcode PCB,
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not the trap frame.
Fixes clone(2) on the Alpha.
2001-07-18 22:22:49 +00:00
6af9e1cf38
Print the stack pointer on a user unaligned access fault.
2001-07-18 22:22:02 +00:00
eef68ab123
In bus_dmamap_sync4060(), fold the POSTREAD case into the PREREAD case
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where it belonged in the first place.
2001-07-18 17:21:49 +00:00
6a9bccd130
Make absolutely sure page tables are not cacheable on 040/060 cpus.
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(Not strictly required for the 040, but mandatory for the 060).
Also revamp cache enable/disable functions for the benefit of
bus_dmamem_map().
2001-07-18 17:18:53 +00:00
db111a0133
Restore FPU context properly on 68060-specific kernels...
2001-07-18 17:13:15 +00:00
c1539a6ba2
Add Jazelle mode flag.
2001-07-18 16:31:17 +00:00
b499a7d558
Add -Wno-main since this is a standalone program.
2001-07-18 05:37:55 +00:00
19014d376c
Modernise data and stack size limits.
2001-07-18 04:15:55 +00:00
909084d90f
Protect userland from the inlines and kernel variable decls.
2001-07-17 20:54:58 +00:00
ef38b7e874
fix a statementless label that gcc-current picked up.
2001-07-17 13:53:15 +00:00
6d1680019c
use a shift instead of a divide.
2001-07-17 13:52:24 +00:00
e0cf8bfa8f
Eject PCMCIA card on ohare based models only.
2001-07-17 12:33:45 +00:00
d68e2c3f12
Redefine evil tXXX register offset defines into the trapframe structure
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to use offsetof. These should be completely nuked.
Fixes math_emulate lossage.
2001-07-17 08:13:06 +00:00
e267c67b60
"infomation" -> "information"
2001-07-17 01:37:43 +00:00
949c8eb434
"infomation" -> "information"
2001-07-16 22:01:38 +00:00
3e1e8af07b
Don't use pmap_changebit() in pmap_protect(), and remove the
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pager mapping check from pmap_changebit().
2001-07-16 21:37:21 +00:00
aff311a28c
Remove I-sync stuff from pmap_changebit(). The AARM says that we
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only have to sync the I-stream when the mapping is removed or chaged,
and since the I-stream is fetch-only, changing protection bits does
not constitute changing the mapping (the VA->PA translation is still
the same).
2001-07-16 19:48:03 +00:00
76f0e59e40
Make bcopy a 32-bit friendly.
2001-07-16 18:59:33 +00:00
091e29f94f
In i386_softintr_lock(), use splserial() rather than splhigh(),
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because of splhigh() braindamage on the i386 port.
Fixes port-i386/13038 and port-i386/12985.
2001-07-16 16:53:00 +00:00
eeh