Rather than an "iointr" routine that decomposes a vector into an
IRQ, we maintain a vector table directly, hooking up each "iointr"
routine at the correct vector. This also allows us to hook device
interrupts up to specific vectors (c.f. Jensen).
We can shave even more cycles off, here, and I will, but it requires
some changes to the alpha_shared_intr stuff.
common routine into the individual load routines, since each load
routine needs to muddle with the "internals" of this operation.
Add a `prefetch threshold' member to the bus_dma_tag_t, so that
eventually we can determine whether or not to allocate a spill
page on a per-mapping basis.
be locked before it can be marked as `active' on a processor.
- Require that pmaps other than the kernel pmap be locked when they
are passed to pmap_tlb_shootdown(). This, combined with the locking
protocol tweak, allow us to get a consistent view of `activeness' of
a pmap, which means we can optmize away a lot of TLB shootdown traffic
for user pmaps.
- Borrow an idea from the i386mp branch; use the normal SHOOTDOWN IPI
to deal with hitting the entire TLB, and garbage-collect the TBIA
and TBIAP IPIs.
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.
Ports that don't need to do this no longer need to supply a
dummy function.
porting this code to i386mp branch):
- call microset() early on each cpu so that calls to microtime()
before the first clock interrupt don't return trash. this manifested
itself as garbage runtimes in "ps" for kernel threads.
- avoid races between hardclock updating "time" and microset on a
different cpu reading it by adding a "microset_time" global which is
initialized from "time" on the primary cpu.
- call microset every hz ticks, not every hz+1 (cosmetic)
each vm_page structure. Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM. These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.
This deprecates struct pmap_physseg. As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.
Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now). Changes to other pmap
modules will follow.
to <sys/types.h> and <sys/stdint.h>.
* Add a new C99 <stdint.h> header, which provides integer types of
explicit width, related limits and integer constant macros.
* Extend <inttypes.h> to provide <stdint.h> definitions and format
macros for printf() and scanf().
* Add C99 strtoimax() and strtoumax() functions.
* Use the latter within scanf().
* Add C99 %j, %t and %z printf()/scanf() conversions for
intmax_t, pointer-type and size_t arguments.
using the cycle counter. MP-safeness is achieved by giving each
CPU its own PCC frequency variables, and kicking the non-primary
processors via an IPI once per second.
Based on the sample code from David Mills' "A Kernel Model for
Precision Timekeeping".
array of those structures at the end of the pmap structure. We compute
the size of the pmap structure based on the maximum CPU ID for a
particular machine. This gives us better cache behavior and better
memory footprint for the ASN info.
call overhead is incurred as we start sprinkling pmap_update() calls
throughout the source tree (no pmaps currently defer operations, but
we are adding the infrastructure to allow them to do so).
SPINLOCK_SPIN_HOOK, so that we actually check for
pending IPIs on the Alpha more than once. Also,
when we call alpha_ipi_process(), make sure to go
to splipi().
to arrive here referencing the kernel_lev1map without having the
RESERVED ASN -- another CPU may have caused pmap_lev1map_destroy()
to be called, and that routine only invalidates the ASN for the
CPU that called it. So, in the MULTIPROCESSOR case, simply assign
the RESERVED ASN if we reference the kernel_lev1map rather than
asserting that we already have the RESERVED ASN. Thanks to Bill
Sommerfeld for helping me track down the problem.
Also add a new IPI that causes a CPU to re-activate its address
space if the pmap it's using changes level 1 maps (this probably
won't happen very often, but it's correct to have it).
This makes Alpha MP kernels boot multiuser. In fact, this commit
is being made from my dual-CPU AlphaServer 1200 running an MP kernel.
thorpej