We can only attach an ath(4) on architectures where we have a HAL
(which is only x86, for now) so I list the files belonging to the
PCI front-end separately from the other PCI files.
http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
serverworks driver not commited yet; there are still copyright issues about
it.
http://mail-index.netbsd.org/tech-kern/2003/09/25/0006.html
This adds a device (atabus) between IDE controllers and wd or atapibus, to
have each ATA channel show up in the device tree. Later there will be atabus
devices in /dev, so that we can do IOCTL on them.
Each atabus has its own kernel thread, to handle operations that needs polling,
e.g. reset and others.
Device probing on each bus it defered to the atabus thread creation.
This allows to do the reset and basic device probes in parallel, which reduce
boot time on systems with several pciide controllers.
removing assumptions that there are only two B channels and by
adding support for a varying number of channels.
Due to this, rename previously used isdn identified "bri" to "isdnif",
which better describes the current situation.
* auich_calibrate() assumes that the AC97 part is in its reset state. To
ensure this, call audio_attach_mi() after auich_calibrate().
* Explicitly support 12000Hz and 24000Hz. (Why is there a discrete list at
all?)
* Fix an obvious recording bug -- we were acking the wrong interrupt.
* Ensure that we don't get an interrupt during the AC97 speed probe by clearing
the "interrupt on completion" bit in the DMA setup.
interface controllers (of varying intelligence levels).
Contributed by Wasabi Systems, Inc. Primarily written by Steve Woodford,
with some modification by me.
to pci_attach_args. The latter is allocated on the stack during auto-
configuration and so will not be valid after that time.
It's amazing how the old code worked for so long. I guess pci_attach_args
is allocated deep in pid#0's kernel stack on most platforms.
- if_bcereg.h should only have register definitions, so declarations
of softc structure etc. should be in if_bce.c.
- The types of DMA descriptors should be u_int32_t, not unsigned long.
- netinet headers are not required here.
- Values passed via bce_tx_ring should also be byte-swapped.
- byte-swapping is not needed for bus_space access.
from me:
- KNF
- mark all magic numbers with /* MAGIC */ so they can be identified at
some point. there are 33 in total though many appear to be the same
value, or related (eg, the 6 emac points.)
leaves these issues:
- RX pre-packet headers need to be byte-swapped or not?
- PAGE_SIZE bytes are allocated for both TX and RX DMA ring descriptors,
but they should be 1024 (== sizeof(struct bce_dma_slot) * N[TR]XDESC).
- the mcast filter.
tsutsui