Commit Graph

7 Commits

Author SHA1 Message Date
thorpej 1600c8b8cd - Add and use a CHAN_TO_WDC() macro to get the wdc_softc from an
ata_channel.
- Add and use a CHAN_TO_WDC_REGS() macro to get the wdc_regs from an
  ata_channel.
- Add and use a CHAN_TO_PCIIDE() macro to get the pciide_softc from an
  ata_channel.
- Add and use a CHAN_TO_PCHAN() macro to get the pciide_channel from an
  ata_channel.  (This one just hides a cast, and is really just for
  consistency with the others.)
2004-08-19 23:25:35 +00:00
thorpej 4b51cecfc2 - Split the register handles out of struct wdc_channel into a separate
wdc_regs structure, and array of which (indexed per channel) is pointed
  to by struct wdc_softc.
- Move the resulting wdc_channel structure to atavar.h and rename it to
  ata_channel.  Rename the corresponding flags.
- Add a "ch_ndrive" member to struct ata_channel, which indicates the
  maximum number of drives that can be present on the channel.  For now,
  this is always 2.  Add an ATA_MAXDRIVES constant that places an upper
  limit on this value, also currently 2.
2004-08-14 15:08:04 +00:00
thorpej 5bd80d8373 Rename "struct channel_softc" to "struct wdc_channel". 2004-01-03 01:50:52 +00:00
fvdl 6242a54566 There are some cards that map the ATA control and IDE DMA registers
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.

To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.

	bus_space_write_4(tag, handle, offset, value)

becomes

	bus_space_write_4(tag, handles[offset], 0, value)

Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
2003-11-27 23:02:40 +00:00
thorpej 132fdb30e6 Make the various timing, etc. tables const, and add the __unused__
attribute to them, just in case something other than the pciide driver
proper needs to pull in the header.
2001-10-21 18:49:19 +00:00
scw 295ed77595 The OPTi controller supports a 32-bit dataport after all.
Also detect when the chip is sitting on a 25MHz PCIbus and
set the timing registers accordingly.
2000-06-07 20:42:52 +00:00
scw 46807640c7 Add support for the OPTi 82c621 PCIIDE controller and its derivatives.
I only have a Compaq laptop on which to test this, so reports of
success/failure in other systems would be welcomed.
2000-05-27 17:18:41 +00:00