Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
109,873 Commits 606 Branches 0 Tags 3.1 GiB
101a152db1
Commit Graph

919 Commits

Author SHA1 Message Date
matt
101a152db1 This contains no marvell specific code now. It now completely hides the 
underlying PCI MD implementation.  XXX want to move this to
powerpc/include/ someday.
 2003-03-15 19:50:31 +00:00
matt
a0b2076415 New generic powerpc bus_space framework. 2003-03-15 08:03:19 +00:00
matt
0f1794e44a Make lint happy and use __asm && __volatile. 
manipulate netisr via lwarx/stwcx. to get atomicity.
 2003-03-15 07:50:28 +00:00
matt
7ad3fe6e03 When mapping a page with BUS_SPACE_NOCACHE, make sure to flush the 
physical page from the data cache.
 2003-03-15 07:25:20 +00:00
matt
35962f72c9 s;backside;; and report L2CR_L2DO & L2CR_L2IO 2003-03-15 07:22:46 +00:00
matt
2b8417e488 Add LINTSTUBs and make oea_init() agree with them. 2003-03-15 07:21:02 +00:00
matt
df24bda908 Make lint happy. 2003-03-15 07:19:20 +00:00
matt
d03db36449 Use aprint_normal. Print 2MB L2 sizes with 7410. 2003-03-14 06:27:40 +00:00
matt
e0242aaebc Remove Debugger call. 2003-03-14 06:25:58 +00:00
matt
d50c91e021 Make lint happy by not assigning to casted lvalue. 2003-03-14 06:23:48 +00:00
matt
12dca1407b Condition ({ ... }) by __GNUC__. Remove redundant SPR_IBAT0U definiton. 2003-03-14 06:22:51 +00:00
matt
d7fc76efe1 Add _LOCORE protection. 2003-03-14 06:21:19 +00:00
matt
61920c743e Make ALI trap print DSISR. 2003-03-14 05:38:53 +00:00
matt
a7b613e469 Use __asm and __volatile to make lint happy. 2003-03-14 05:37:51 +00:00
matt
ce05df7bc7 Quiet lint warning. 2003-03-14 05:37:14 +00:00
matt
8ceb32c0af make LINTSTUB work with this. 2003-03-14 05:36:39 +00:00
matt
c894ddaec1 Print more useful messages on kernel ALI or PGM traps. 2003-03-14 05:32:27 +00:00
matt
0c29e154e3 Use __asm & __volatile to make lint(1) happy. 2003-03-13 17:30:38 +00:00
matt
cd26de2684 Same code exists in both halves in #ifdef/#else/#endif. move it outside. 2003-03-12 06:00:36 +00:00
hannken
44b1e07ec9 Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403". 
- different set of device control registers.
  - non-standard access to the time base.
  - 16 byte cache lines.

Approved by: Eduardo Horvath <eeh@netbsd.org>
 2003-03-11 10:40:15 +00:00
matt
210f48e582 Remove unneeded conditional code. 2003-03-06 07:15:46 +00:00
matt
0b8a5fd80f Adapt to powerpc/bus.h changes. 2003-03-06 00:20:39 +00:00
matt
ff2281b498 Add preliminary support Marvell (Galileo) Discovery System Controllers. 
This code was contributed by Allegro Networks.
 2003-03-05 22:08:18 +00:00
matt
6d251b3be3 Make AltiVec registers available via ptrace/procfs. Simplify AltiVec 
processing.  Add a "common" procfs_machdep.c for PowerPC platforms.
Even though it is supposed to be port specific, most (if not all)
PowerPC ports can just use the common one.
 2003-03-05 05:27:24 +00:00
matt
fb2cebb577 Pass the address of the intrframe to the ext_intr routine. 2003-03-04 08:34:12 +00:00
matt
107803a3a3 Re-arrange things in evbppc & powerpc to support OEA-based eval boards 
in evbppc.  OEA-based board(s) to be added later.
 2003-03-04 07:50:57 +00:00
matt
9875f9218d Add some missing volatiles. 2003-03-04 07:48:09 +00:00
tshiozak
31e2cbf0b5 add some ISO C 1995 I18N functions and types: 
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.
 2003-03-02 22:18:11 +00:00
matt
5401f85320 Restore MQ to trapframe from mcontext since it's in both. 2003-03-02 01:07:55 +00:00
jklos
b9f3bdb8fb Added L3CR_CONFIG to the parameter list for 745x L3 cache configuration. 2003-02-26 21:14:32 +00:00
jklos
0c5117e1f9 Added configuration entries for L3CR_CONFIG for L3 caches on 745x 
accelerators. Thanks to Monroe Williams.
 2003-02-26 21:10:51 +00:00
jklos
7109206620 Added L3CR_CONFIG for support of 745x G4 L3 cache configuration. 2003-02-26 21:05:23 +00:00
matt
869bbf806d Add some RAS support. Don't print out a message when we encounter 
trap instructions.
 2003-02-25 23:32:03 +00:00
matt
8609ed56b8 Only define KERN_AS= object if IDENT has -DLKM. 2003-02-24 07:15:40 +00:00
atatat
860ed88533 #include opt_uvm.h in machine/vmparam.h (for those ports offering the 
topdown option) so that including it directly before including
uvm/uvm_param.h (or uvm/uvm_extern.h which includes uvm/uvm_param.h)
and attempting to use topdown won't result in a compiler error.

Problem noted in private email.
 2003-02-23 19:13:43 +00:00
matt
b03aef6efc witch from xor r,r,r to li r,0 to set a register to 0. It's clearer (and 
better for G4 processors).
 2003-02-21 15:14:08 +00:00
matt
c1234c6385 Add TOPDOWN VM support. 2003-02-21 03:41:52 +00:00
matt
b42cde14b7 Set KERN_AS=obj now that LKMs work. (otherwise when you loaded LKMs they 
wouldn't have all the library routines available).
 2003-02-19 23:55:48 +00:00
matt
5bcfb63de7 Add PSL_PM 2003-02-14 04:45:32 +00:00
matt
8268fcff94 Use register 8, not 0, when construct OF_buffer address. 2003-02-13 15:02:49 +00:00
manu
06def0e4fb Build again 2003-02-10 21:46:49 +00:00
matt
f6201cca8d Only include kernel headers if _KERNEL is defined. 2003-02-10 04:01:37 +00:00
matt
47afa5aa99 Don't try to reserve DEAD zone unless the kernel address space encompasses it. 2003-02-08 20:42:07 +00:00
matt
4fefe75ac1 Add comments to describe PowerPC64 ABI register usage. 2003-02-08 20:03:22 +00:00
thorpej
6068b273f4 Fix some printf formats. 2003-02-07 04:39:09 +00:00
matt
48e8876d50 Add a _bus_dmamap_sync which supports cache-incoherent implementations. 
Support BUS_DMA_NOCACHE.
 2003-02-06 23:03:54 +00:00
matt
5d223c9c9c Add oea_iobat_remove(paddr_t). 2003-02-06 23:02:33 +00:00
matt
42b98bbd45 Allow KERNEL_SR/KERNEL2_SR to be overriden (I run a kernel with 
the mapped space at 0x8000000-0x9fffffff).
 2003-02-06 23:01:32 +00:00
matt
c766d3b064 Include vmparam.h to get USER_SR. 2003-02-06 23:00:15 +00:00
nakayama
e3e4805068 Replace machine/rnd.h with more appropriate name to share it 
with cycle counter based microtime in kern/kern_microtime.c.
 2003-02-05 13:57:50 +00:00