Commit Graph

30 Commits

Author SHA1 Message Date
thorpej
a5a8439141 Make the snake slither in a slightly more interesting pattern that
also happens to have 8 positions (and thus has a slightly more efficient
implementation).
2001-12-01 21:23:17 +00:00
thorpej
216b9b2ea6 - Don't enable FIQs; nothing uses them (yet).
- Steer i80200 PMU and BCU interrupts to IRQ# (for lack of a better
  place, at the moment).
- Disable all interrupts other than external-IRQ# in the i80200 ICU;
  we don't deal with any of the others, yet.
2001-12-01 06:15:36 +00:00
thorpej
a7cfcd87fd Implement a "snake" for the 7-segment display. 2001-12-01 02:04:27 +00:00
thorpej
5f8b540ed9 Remove U from the display seg constants. 2001-12-01 02:02:46 +00:00
thorpej
a9b25a66fa When processing ASTs:
- Loop until astpending is clear upon return from ast().
- Clear astpending *before* re-enabling interrupts.
2001-11-28 01:31:59 +00:00
thorpej
7184ed949e Update copyright notice. 2001-11-27 00:35:34 +00:00
thorpej
34ce8c531b Don't need to include <machine/irqhandler.h> 2001-11-27 00:34:48 +00:00
thorpej
8cd82ab7b7 Move interrupt-related stuff out of the generic 32-bit ARM genassym.cf
and into platform-specific genassym.cf files.
2001-11-27 00:15:58 +00:00
thorpej
d8415403ba Fix brain'o in handling of schedhz and profhz. Also, make sure to
compute tickfix after computing tick (not that tickfix should ever
be non-zero, but there for completeness).
2001-11-26 18:01:05 +00:00
thorpej
fc019be5fd Use <arm/undefined.h> instead of <machine/undefined.h>. 2001-11-23 21:18:29 +00:00
thorpej
969599022a Use <arm/cpufunc.h>, not <machine/cpufunc.h>. 2001-11-23 19:36:48 +00:00
thorpej
fec02f1259 No need to pull in <machine/pte.h> directly. 2001-11-23 17:23:40 +00:00
thorpej
ba9581a345 Reorder the device table to make the UART at J9 attach before the
UART at J10 (this is the same ordering the RedBoot uses, and also
is intuitive).
2001-11-19 19:08:33 +00:00
thorpej
944fcd0d83 Allocate the appropriate space for the XScale global cache clean code. 2001-11-11 17:30:14 +00:00
thorpej
d1f4bf74ca Add support for PCI DMA on the i80312. We currently just do
DMA via the Secondary Inbound window, for now.  Will probably
need to revisit this at some point.

Require that the board-specific i80312 front-end slice off a
subregion for the memory controller before calling i80312_attach(),
and fix a bug in the IQ80310 front-end that caused the Secondary
Inbound window to be configured incorrectly.
2001-11-09 23:15:52 +00:00
thorpej
3797f5214d Fix typos in determing the ATU and PPB bus numbers. 2001-11-09 22:47:48 +00:00
thorpej
393b381a6d PCI interrupt mapping support for the IQ80310. 2001-11-09 20:58:57 +00:00
thorpej
147b1bdc1c Add some rudimentary support for ELF symbols in DDB on the ARM ports.
On platforms which load the kernel sans symbols directly from firmware
(possibly in e.g. S-Record format), call ddb_init() with empty arguments,
so that it will search any compiled in SYMTAB_SPACE.  On all other platforms,
if __ELF__, also call ddb_init() with empty arguments until ELF bootloaders
which pass symbol information are ready.
2001-11-09 07:21:37 +00:00
thorpej
47514a31be Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.
2001-11-09 06:52:23 +00:00
thorpej
b72e770a8a IQ80310-specific setup for the i80312 Companion I/O chip driver. 2001-11-09 03:31:37 +00:00
thorpej
3130a93ac8 Remove unnecessary prototypes for zero_page_read{only,write}(). 2001-11-09 00:34:34 +00:00
thorpej
64d042b3b3 Correct a comment. 2001-11-08 04:18:46 +00:00
thorpej
05dfd6cada * Define fixed virtual addresses for the Primary and Secondary
PCI I/O spaces, as well as the i80312 PMMRs.  Map these regions
  in early bootstrap along with the on-board device address space.
* Adjust call to i80312_sdram_bounds() for the new way the PMMRs
  are defined in i80312reg.h
* Word around some serious braindamage in RedBoot -- RedBoot uses
  the on-board Ethernet to TFTP the kernel image.  However, it does
  not stop the Ethernet before transferring control to the loaded
  program.  This means that if it happens to receive another packet
  (broadcast/multicast/unicast), it will happily scribble over the
  memory of the new running program.  Work around this problem by
  performing a secondary-bus-reset on the i80312's PPB.  XXX This
  could be problematic if we ever encounter an application where
  the i80312's PPB is actually used as a passthrough PPB.
2001-11-08 03:28:53 +00:00
thorpej
f30c8426f2 Fix delay(). 2001-11-08 02:12:05 +00:00
thorpej
9cc2517cfe When we read the interrupt status bits, mask it with the shadow copy
of the "currently enabled interrupts" -- the CPLD appears to light
up the status bit even if it doesn't cause the CPU IRQ line to be
asserted.
2001-11-07 02:56:18 +00:00
thorpej
0ea59754f1 We were already cheating w/ CPLD register access, so cheat all the
way and use pointer derefs rather than bus_space to access them.
2001-11-07 02:24:18 +00:00
thorpej
4a2c5fd66d * Pass the IRQ number to stray_irqhandler() and display it in
the panic message.
* Mask off undefined bits from the XINT3 and XINT0 registers in the CPLD.
2001-11-07 02:06:37 +00:00
thorpej
acf9a688a0 Rework and fleshing out of Intel IQ80310 XScale eval board support.
More work to do -- this is a snapshot of work-in-progress.
2001-11-07 00:33:22 +00:00
matt
1bf6aa62be more evbarm files (very incomplete). 2001-09-05 04:53:39 +00:00
matt
64bde37d3a com (16550) attachment for iq80310 2001-09-02 18:50:13 +00:00