For drivers that name their pins, this can be used to determine how the
logical pins are mapped to physical pins. Example from sunxigpio(4):
# gpioctl gpio0 list
0: PA0
1: PA1
2: PA2
...
- Remove the old, not-expressive-enough interrupt flags, and replace them
with a new set of interrupt-specific flags that can express a wide
variety of interrupt configurations (pos, neg, and double-edge, high
and low level).
- Remove old, unused gpio_pin_ctl_intr() and gpio_pin_irqen(), and
replace them with gpio_intr_establish(), gpio_intr_disestablish(),
and gpio_intr_str(). Corresponding fields in the gpio_chipset_tag
are also added for back-end controllers, which now handle the actual
dispatch of GPIO interrupts in order to properly support level-triggered
interrupts as well as interoperate properly with FDT-registered
interrupts.
Piggy-back on the 8.99.18 version bump.
Inspired by initial work from Brad Spencer.
PR kern/51676
instructs gpioctl(8) to only output a single numeric value, either the
number of pins if no pin number was passed as argumenti, or, the current
state of the pin.
specific flags to drivers being attached at gpio pins. gpioiic(4)
uses this to reverse the SDA/SCL signal order. gpioctl(8) accepts
the flag values as optional argument to the attach command.
While here, make sure we retain backwards compatability and wrap compat
code in #ifdef COMPAT_50/#endif.
If a pin can pulse in hardware, that will be used, else it will
be pulsed in software. There is no way yet to set the pulse frequency
for pins that pulse in hardware. While here, make the code mpsafe and
allow more than one thread in the driver (access to ioctl is serialized).
jakllsch